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[72.225.192.120]) by smtp.gmail.com with ESMTPSA id r4-20020a05622a034400b00398a7c860c2sm7680696qtw.4.2022.10.11.13.58.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 11 Oct 2022 13:58:29 -0700 (PDT) Message-ID: Date: Tue, 11 Oct 2022 16:58:28 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH V2] arm64: dts: fix drive strength macros as per FSD HW UM Content-Language: en-US To: Padmanabhan Rajanbabu , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, alim.akhtar@samsung.com, chanho61.park@samsung.com, linus.walleij@linaro.org, pankaj.dubey@samsung.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org References: <20221011080359.76220-1-p.rajanbabu@samsung.com> From: Krzysztof Kozlowski In-Reply-To: <20221011080359.76220-1-p.rajanbabu@samsung.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/10/2022 04:03, Padmanabhan Rajanbabu wrote: > Drive strength macros defined for FSD platform is not reflecting actual > name and values as per HW UM. FSD SoC pinctrl has following four levels of s/name/names/ > drive-strength and their corresponding values: > Level-1 <-> 0 > Level-2 <-> 1 > Level-4 <-> 2 > Level-6 <-> 3 > > The commit 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") > used drive strength macros defined for Exynos4 SoC family. For some IPs > the macros values of Exynos4 matched and worked well, but Exynos4 SoC > family drive-strength (names and values) is not exactly matching with > FSD SoC. > > Fix the drive strength macros to reflect actual names and values given > in FSD HW UM. This also ensures that the existing peripherals in device > tree file is using correct drive strength MACROs to function as > expected. > > Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") > Signed-off-by: Padmanabhan Rajanbabu > --- Rest of commit msg looks ok. > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 34 +++++++++++----------- > arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 6 ++-- > 2 files changed, 20 insertions(+), 20 deletions(-) > > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > index d0abb9aa0e9e..e3852c946352 100644 > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi > @@ -55,14 +55,14 @@ > samsung,pins = "gpf5-0"; > samsung,pin-function = ; > samsung,pin-pud = ; > - samsung,pin-drv = ; > + samsung,pin-drv = ; > }; > > ufs_refclk_out: ufs-refclk-out-pins { > samsung,pins = "gpf5-1"; > samsung,pin-function = ; > samsung,pin-pud = ; > - samsung,pin-drv = ; > + samsung,pin-drv = ; > }; > }; > > @@ -239,105 +239,105 @@ > samsung,pins = "gpb6-1"; > samsung,pin-function = ; > samsung,pin-pud = ; > - samsung,pin-drv = ; > + samsung,pin-drv = ; > }; > > pwm1_out: pwm1-out-pins { > samsung,pins = "gpb6-5"; > samsung,pin-function = ; > samsung,pin-pud = ; > - samsung,pin-drv = ; > + samsung,pin-drv = ; > }; > > hs_i2c0_bus: hs-i2c0-bus-pins { > samsung,pins = "gpb0-0", "gpb0-1"; > samsung,pin-function = ; > samsung,pin-pud = ; > - samsung,pin-drv = ; > + samsung,pin-drv = ; You are now changing both the value for register and the meaning (name). Your commit msg indicated that the names are not correct, not the values. Based on the commit msg, I expect the DTBs are the same. Are they? If not, it these are two different commits with their own explanations/reasoning. Best regards, Krzysztof