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From:   "Padmanabhan Rajanbabu" <p.rajanbabu@samsung.com>
To:     "'Krzysztof Kozlowski'" <krzysztof.kozlowski@linaro.org>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <alim.akhtar@samsung.com>, <chanho61.park@samsung.com>,
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Cc:     <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-samsung-soc@vger.kernel.org>
In-Reply-To: <fa7c6054-7076-299d-ed0f-9e4fc0ffc194@linaro.org>
Subject: RE: [PATCH V2] arm64: dts: fix drive strength macros as per FSD HW
 UM
Date:   Wed, 12 Oct 2022 14:00:55 +0530
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References: <CGME20221011083029epcas5p3cef6047d23d0682a9cb70ba6178067a8@epcas5p3.samsung.com>
        <20221011080359.76220-1-p.rajanbabu@samsung.com>
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> -----Original Message-----
> From: Krzysztof Kozlowski =5Bmailto:krzysztof.kozlowski=40linaro.org=5D
> Sent: 12 October 2022 02:28 AM
> To: Padmanabhan Rajanbabu <p.rajanbabu=40samsung.com>;
> robh+dt=40kernel.org; krzysztof.kozlowski+dt=40linaro.org;
> alim.akhtar=40samsung.com; chanho61.park=40samsung.com;
> linus.walleij=40linaro.org; pankaj.dubey=40samsung.com
> Cc: devicetree=40vger.kernel.org; linux-kernel=40vger.kernel.org; linux-
> samsung-soc=40vger.kernel.org
> Subject: Re: =5BPATCH V2=5D arm64: dts: fix drive strength macros as per =
FSD HW
> UM
>=20
> On 11/10/2022 04:03, Padmanabhan Rajanbabu wrote:
> > Drive strength macros defined for FSD platform is not reflecting
> > actual name and values as per HW UM. FSD SoC pinctrl has following
> > four levels of
>=20
> s/name/names/
Okay.
>=20
> > drive-strength and their corresponding values:
> > Level-1 <-> 0
> > Level-2 <-> 1
> > Level-4 <-> 2
> > Level-6 <-> 3
> >
> > The commit 684dac402f21 (=22arm64: dts: fsd: Add initial pinctrl
> > support=22) used drive strength macros defined for Exynos4 SoC family.
> > For some IPs the macros values of Exynos4 matched and worked well, but
> > Exynos4 SoC family drive-strength (names and values) is not exactly
> > matching with FSD SoC.
> >
> > Fix the drive strength macros to reflect actual names and values given
> > in FSD HW UM. This also ensures that the existing peripherals in
> > device tree file is using correct drive strength MACROs to function as
> > expected.
> >
> > Fixes: 684dac402f21 (=22arm64: dts: fsd: Add initial pinctrl support=22=
)
> > Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu=40samsung.com>
> > ---
>=20
> Rest of commit msg looks ok.
>=20
> >  arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi =7C 34 +++++++++++---------=
--
> >  arch/arm64/boot/dts/tesla/fsd-pinctrl.h    =7C  6 ++--
> >  2 files changed, 20 insertions(+), 20 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > index d0abb9aa0e9e..e3852c946352 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > =40=40 -55,14 +55,14 =40=40
> >  		samsung,pins =3D =22gpf5-0=22;
> >  		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> >  		samsung,pin-pud =3D <FSD_PIN_PULL_NONE>;
> > -		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
> > +		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> >  	=7D;
> >
> >  	ufs_refclk_out: ufs-refclk-out-pins =7B
> >  		samsung,pins =3D =22gpf5-1=22;
> >  		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> >  		samsung,pin-pud =3D <FSD_PIN_PULL_NONE>;
> > -		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
> > +		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> >  	=7D;
> >  =7D;
> >
> > =40=40 -239,105 +239,105 =40=40
> >  		samsung,pins =3D =22gpb6-1=22;
> >  		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> >  		samsung,pin-pud =3D <FSD_PIN_PULL_UP>;
> > -		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
> > +		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> >  	=7D;
> >
> >  	pwm1_out: pwm1-out-pins =7B
> >  		samsung,pins =3D =22gpb6-5=22;
> >  		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> >  		samsung,pin-pud =3D <FSD_PIN_PULL_UP>;
> > -		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
> > +		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> >  	=7D;
> >
> >  	hs_i2c0_bus: hs-i2c0-bus-pins =7B
> >  		samsung,pins =3D =22gpb0-0=22, =22gpb0-1=22;
> >  		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> >  		samsung,pin-pud =3D <FSD_PIN_PULL_UP>;
> > -		samsung,pin-drv =3D <FSD_PIN_DRV_LV1>;
> > +		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
>=20
> You are now changing both the value for register and the meaning (name).
> Your commit msg indicated that the names are not correct, not the values.
> Based on the commit msg, I expect the DTBs are the same. Are they? If not=
,
> it these are two different commits with their own explanations/reasoning.
In some cases, yes, both name and values requires modification. I understoo=
d=20
that I have to split this into two patches, correcting the MACRO names and =
values
in one patch and fixing the drive strength for some of the IPs in other pat=
ch.
>=20
> Best regards,
> Krzysztof