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Message-ID: <76415dd7-aa74-7bf7-1952-dd1c847a5b57@linaro.org>
Date:   Wed, 12 Oct 2022 09:39:25 -0400
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Subject: Re: [PATCH 06/11] dt-bindings: thermal: k3-j72xx: conditionally
 require efuse reg range
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To:     Bryan Brattlof <bb@ti.com>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     "Rafael J. Wysocki" <rafael@kernel.org>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Amit Kucheria <amitk@kernel.org>,
        Zhang Rui <rui.zhang@intel.com>, Nishanth Menon <nm@ti.com>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Tero Kristo <kristo@kernel.org>, Keerthy <j-keerthy@ti.com>,
        Linux Thermal <linux-pm@vger.kernel.org>,
        Linux Device Tree <devicetree@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>
References: <20221011231727.8090-1-bb@ti.com>
 <20221011231727.8090-7-bb@ti.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20221011231727.8090-7-bb@ti.com>
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On 11/10/2022 19:17, Bryan Brattlof wrote:

> +then:
> +  properties:
> +    reg:
> +      items:
> +        - description: VTM cfg1 register space
> +        - description: VTM cfg2 register space
> +        - description: |
> +            A software trimming method must be applied to some Jacinto
> +            devices to function properly. This eFuse region provides
> +            the information needed for these SoCs to report
> +            temperatures accurately.
> +else:
> +  properties:
> +    reg:
> +      items:
> +        - description: VTM cfg1 register space
> +        - description: VTM cfg2 register space
> +

BTW, you have additionalProperties:false, so how you coded it won't
work. Test your bindings before sending.

Best regards,
Krzysztof