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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ck16-20020a0564021c1000b0045731196587si11813273edb.64.2022.10.12.18.19.04; Wed, 12 Oct 2022 18:19:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=T5buMJnL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230251AbiJMBNX (ORCPT + 99 others); Wed, 12 Oct 2022 21:13:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52310 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230110AbiJMBMi (ORCPT ); Wed, 12 Oct 2022 21:12:38 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E5B2222B0; Wed, 12 Oct 2022 18:11:43 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 14DB3B81CC4; Thu, 13 Oct 2022 00:21:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 44A20C433C1; Thu, 13 Oct 2022 00:21:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665620516; bh=xqu7Y1D0nbdqkEbtGEB1friyJ8u0gdnTjIHUhQCEvsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T5buMJnLqyMXEGM9S2xcX0b/F+3X1lbK8YIlt0VVPl3Ykac3/aVVaLNpQ+KN3PB4Y b4SxJv4h9Zd1/WnNZJWqJOp+NFWVUfIO44NV8qI21KMFAkloTTzCuvf8G12g1I1kcf 0JmLoY/lQto7aCPdG8TAKG1Or+DOXOftd5OOU6TU5ZW8gOV1R4qfcUfsSGUs5e/w+p 9YnLqQ42HuFzPSq3malQ5LuiVAInE3rf9bS+FokWJQiWbEf8gOMcgNjR0m09C8vfsF 47Jovy4UhRE+vz1BYBkpEI/NrDpx2I76wDj72t0Wvp28kRDUZhG7AW7QqydlYKL25K egZf0lQqw3ktw== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Yicong Yang , Will Deacon , John Garry , Mathieu Poirier , Sasha Levin , joro@8bytes.org, robin.murphy@arm.com, baolu.lu@linux.intel.com, jgg@ziepe.ca, tglx@linutronix.de, shameerali.kolothum.thodi@huawei.com, christophe.jaillet@wanadoo.fr, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev Subject: [PATCH AUTOSEL 5.15 10/47] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Date: Wed, 12 Oct 2022 20:20:45 -0400 Message-Id: <20221013002124.1894077-10-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221013002124.1894077-1-sashal@kernel.org> References: <20221013002124.1894077-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yicong Yang [ Upstream commit 24b6c7798a0122012ca848ea0d25e973334266b0 ] The DMA operations of HiSilicon PTT device can only work properly with identical mappings. So add a quirk for the device to force the domain as passthrough. Acked-by: Will Deacon Signed-off-by: Yicong Yang Reviewed-by: John Garry Link: https://lore.kernel.org/r/20220816114414.4092-2-yangyicong@huawei.com Signed-off-by: Mathieu Poirier Signed-off-by: Sasha Levin --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 79edfdca6607..e7da4a47ce52 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2832,6 +2832,26 @@ static int arm_smmu_dev_disable_feature(struct device *dev, } } +/* + * HiSilicon PCIe tune and trace device can be used to trace TLP headers on the + * PCIe link and save the data to memory by DMA. The hardware is restricted to + * use identity mapping only. + */ +#define IS_HISI_PTT_DEVICE(pdev) ((pdev)->vendor == PCI_VENDOR_ID_HUAWEI && \ + (pdev)->device == 0xa12e) + +static int arm_smmu_def_domain_type(struct device *dev) +{ + if (dev_is_pci(dev)) { + struct pci_dev *pdev = to_pci_dev(dev); + + if (IS_HISI_PTT_DEVICE(pdev)) + return IOMMU_DOMAIN_IDENTITY; + } + + return 0; +} + static struct iommu_ops arm_smmu_ops = { .capable = arm_smmu_capable, .domain_alloc = arm_smmu_domain_alloc, @@ -2857,6 +2877,7 @@ static struct iommu_ops arm_smmu_ops = { .sva_unbind = arm_smmu_sva_unbind, .sva_get_pasid = arm_smmu_sva_get_pasid, .page_response = arm_smmu_page_response, + .def_domain_type = arm_smmu_def_domain_type, .pgsize_bitmap = -1UL, /* Restricted during device attach */ .owner = THIS_MODULE, }; -- 2.35.1