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Date:   Thu, 13 Oct 2022 10:02:45 +0200
From:   =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= <clement.leger@bootlin.com>
To:     Frank Rowand <frowand.list@gmail.com>
Cc:     Lizhi Hou <lizhi.hou@amd.com>, linux-pci@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        robh@kernel.org, helgaas@kernel.org, max.zhen@amd.com,
        sonal.santan@amd.com, larry.liu@amd.com, brian.xu@amd.com,
        stefano.stabellini@xilinx.com, trix@redhat.com
Subject: Re: [PATCH RFC 0/2] Generate device tree node for pci devicesgain,
Message-ID: <20221013100245.14c509ec@fixe.home>
In-Reply-To: <0d571d21-507d-fcc5-bf58-d02f958de28a@gmail.com>
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Le Thu, 13 Oct 2022 01:05:26 -0500,
Frank Rowand <frowand.list@gmail.com> a =C3=A9crit :

> > This would also require two different descriptions of the same card
> > (for ACPI and device-tree) and would require the final user to create a
> > specific overlay for its device based on the PCI slots the card is
> > plugged in. =20
>=20
> One of the many missing pieces of overlay support.  There have been sever=
al
> discussion of how to describe a "socket" in a device tree that a device
> could be plugged into, where a single device tree subtree .dtb could be
> relocated to one or more different socket locations.  Thus in this
> case a single overlay could be relocated to various PCI slots.
>=20
> I don't expect be getting involved in any future efforts around sockets
> (see my following comment for why).
>=20
> >=20
> > The solution we proposed (Lizhi and I) allows to overcome these
> > problems and is way easier to use. Fixing the potential bugs that might
> > exists in the overlay layer seems a way better idea that just pushing =
=20
>=20
> It is not potential bugs.  The current run time overlay implementation is
> proof of concept quality and completeness.  It is not production ready.
>=20
> I got an opportunity for early retirement a couple of weeks ago.  My first
> inclination was to continue the same level of device tree maintainership,
> but I am quickly realizing that there are other activities that I would
> like to devote my time and energy to.  I will continue to support Rob with
> minor patch reviews and testing, and potentially finishing up some
> improvements to unittest.  On the other hand, bringing run time overlay
> support to product quality would be a major investment of my time that I
> am not willing to continue.

Hi Frank,

This explains your position on the overlay support and I can
certainly understand it ! Regarding the fact that it would enter
"production", the devices we are talking about are not really
widespread yet? This would be a good opportunity to gather feedback
early and improve the support gradually. We could probably even be able
to support improvements in the overlay code if needed I guess.

Thanks for your honest answer,

Cl=C3=A9ment

>=20
> So I am leaving major overlay issues in the capable hands of Rob.  I may
> chime in from time to time when I can do so without requiring too much of
> my time.
>=20
> -Frank
>=20
> > that away to the bootloader level. Moreover, this kind of devices is
> > likely to be more common with the increasing popularity of FPGA and a
> > proper solution must be found.
> >  =20


--=20
Cl=C3=A9ment L=C3=A9ger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com