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[209.85.219.172]) by smtp.gmail.com with ESMTPSA id ay11-20020a05620a178b00b006bb78d095c5sm16891652qkb.79.2022.10.13.01.24.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Oct 2022 01:24:31 -0700 (PDT) Received: by mail-yb1-f172.google.com with SMTP id e62so1208298yba.6; Thu, 13 Oct 2022 01:24:31 -0700 (PDT) X-Received: by 2002:a25:687:0:b0:6c2:2b0c:26e with SMTP id 129-20020a250687000000b006c22b0c026emr5766529ybg.202.1665649471275; Thu, 13 Oct 2022 01:24:31 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Geert Uytterhoeven Date: Thu, 13 Oct 2022 10:24:18 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] dt-bindings: memory: renesas,rpc-if: Document R-Car V4H support To: Wolfram Sang Cc: Krzysztof Kozlowski , Rob Herring , Sergei Shtylyov , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hai Pham Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Wolfram, On Thu, Oct 13, 2022 at 10:00 AM Wolfram Sang wrote: > > I actually wrote such a patch a while back. > > However, I didn't send it after discovering the R-Car V3U Series > > User’s Manual Rev. 0.50 does not mention the fourth Strobe Timing > > Adjustment bit (STRTIM) in the RPC-IF PHY Control Register (PHYCNT), > > which is present on R-Car S4-8 and V4H, but not on R-Car Gen3. > > I see. Thanks for the heads up! Maybe this is worth a comment because it > is an exception to the usual behaviour? You mean an exception to the exception to the usual behaviour that R-Car 3 is part of the R-Car Gen3 family, making it the normal rule? ;-) We're actually not 100% sure the bit is present or not. Rev. 0.50 is still an early revision of the R-Car V3U documentation, so it might lack some updates. I tried changing all bits of the PHYCNT register, but unfortunately all bits except for bit 31 stick on all SoCs I tried, so we can't use this method to determine which bits exist and which don't. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds