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[72.225.192.120]) by smtp.gmail.com with ESMTPSA id m3-20020ac85b03000000b00394fce5fa64sm91204qtw.9.2022.10.13.07.35.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Oct 2022 07:35:56 -0700 (PDT) Message-ID: <7315338a-762f-51a4-d26f-d94de71dfcf2@linaro.org> Date: Thu, 13 Oct 2022 10:35:54 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [RESEND PATCH] clk: samsung: exynos7885: Correct "div4" clock parents Content-Language: en-US To: David Virag Cc: Sylwester Nawrocki , Tomasz Figa , Chanwoo Choi , Alim Akhtar , Michael Turquette , Stephen Boyd , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20221013151341.151208-1-virag.david003@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20221013151341.151208-1-virag.david003@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/10/2022 11:13, David Virag wrote: > "div4" DIVs which divide PLLs by 4 are actually dividing "div2" DIVs by > 2 to achieve a by 4 division, thus their parents are the respective > "div2" DIVs. These DIVs were mistakenly set to have the PLLs as parents. > This leads to the kernel thinking "div4"s and everything under them run > at 2x the clock speed. Fix this. > > Fixes: 45bd8166a1d8 ("clk: samsung: Add initial Exynos7885 clock driver") > Signed-off-by: David Virag > --- Looks good, I'll take it after merge window. Best regards, Krzysztof