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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2022 18:39:15.5778 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fd245d28-8fa2-437d-9234-08daad4a3b22 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT108.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6103 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, SPF_HELO_PASS,SPF_NONE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series contains enhancements to the pcie-tegra194.c driver that works for both Tegra194 and Tegra234 SoCs and for both RootPort and Endpoint modes. This patch series depends on the following series in the same order PCI: designware-ep: Fix DBI access before core init https://patchwork.ozlabs.org/project/linux-pci/list/?series=322681 PCI: endpoint: Rework the EPC to EPF notification https://patchwork.kernel.org/project/linux-pci/list/?series=683493 Add DeInit support in the PCIe Endpoint framework https://patchwork.kernel.org/project/linux-pci/list/?series=685157 V3: * Addressed review comments from Bjorn * Added new patches to the series V2: * Addressed review comments from test bot and Vinod Vidya Sagar (21): PCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select" PCI: tegra194: Drive CLKREQ signal low explicitly PCI: tegra194: Fix polling delay for L2 state PCI: tegra194: Handle errors in BPMP response PCI: tegra194: Apply pinctrl settings for both PCIe RP and EP PCI: tegra194: Refactor LTSSM state polling on surprise down PCI: tegra194: Disable direct speed change for EP phy: tegra: p2u: Set ENABLE_L2_EXIT_RATE_CHANGE in calibration PCI: tegra194: Calibrate P2U for endpoint mode PCI: tegra194: Free resources during controller deinitialization PCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registration PCI: tegra194: Enable DMA interrupt PCI: tegra194: Enable hardware hot reset mode in Endpoint PCI: tegra194: Allow system suspend when the Endpoint link is not up PCI: tegra194: Disable L1.2 capability of Tegra234 EP PCI: tegra194: Set LTR message request before PCIe link up PCI: tegra194: Reduce AXI slave timeout value PCI: tegra194: Don't force the device into the D0 state before L2 PCI: tegra194: Free up EP resources during remove() dt-bindings: PCI: tegra194: Add monitor clock support PCI: tegra194: Add core monitor clock support .../bindings/pci/nvidia,tegra194-pcie-ep.yaml | 6 +- .../bindings/pci/nvidia,tegra194-pcie.yaml | 6 +- drivers/pci/controller/dwc/pcie-tegra194.c | 261 ++++++++++++------ drivers/phy/tegra/phy-tegra194-p2u.c | 14 + 4 files changed, 194 insertions(+), 93 deletions(-) -- 2.17.1