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Date:   Thu, 13 Oct 2022 13:05:09 -0700
From:   "H. Peter Anvin" <hpa@zytor.com>
To:     "Li, Xin3" <xin3.li@intel.com>,
        "Bae, Chang Seok" <chang.seok.bae@intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "x86@kernel.org" <x86@kernel.org>
CC:     "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "bp@alien8.de" <bp@alien8.de>,
        "dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
        "peterz@infradead.org" <peterz@infradead.org>
Subject: RE: [PATCH v2 1/6] x86/cpufeature: add cpu feature bit for LKGS
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On October 13, 2022 12:35:23 PM PDT, "Li, Xin3" <xin3=2Eli@intel=2Ecom> wro=
te:
>
>> > diff --git a/arch/x86/include/asm/cpufeatures=2Eh
>> > b/arch/x86/include/asm/cpufeatures=2Eh
>> > index ef4775c6db01=2E=2E459fb0c21dd4 100644
>> > --- a/arch/x86/include/asm/cpufeatures=2Eh
>> > +++ b/arch/x86/include/asm/cpufeatures=2Eh
>> > @@ -308,6 +308,7 @@
>> >   /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word=
 12 */
>> >   #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI
>> instructions */
>> >   #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512
>> BFLOAT16 instructions */
>> > +#define X86_FEATURE_LKGS		(12*32+ 18) /* Load "kernel"
>> (userspace) gs */
>>=20
>> The spec says [1]:
>>      "Execution of LKGS causes an invalid-opcode exception (#UD) if CPL=
 >
>>       0=2E"
>>=20
>> Perhaps userspace has no interest in this=2E Then, we can add "" not to=
 show
>> "lkgs" in /proc/cpuinfo:
>>      +#define X86_FEATURE_LKGS		(12*32+ 18) /* "" Load "kernel"
>> (userspace) gs */
>
>Good point!
>
>>=20
>> Thanks,
>> Chang
>>=20
>> [1] https://cdrdv2=2Eintel=2Ecom/v1/dl/getContent/678938
>

It would be useful for reviewers to mention that this is was a policy chan=
ge on the maintainers' part=2E This is totally valid, of course, but making=
 it explicit would perhaps help reduce potential confusion=2E