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From:   "Alim Akhtar" <alim.akhtar@samsung.com>
To:     "'Padmanabhan Rajanbabu'" <p.rajanbabu@samsung.com>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <chanho61.park@samsung.com>, <linus.walleij@linaro.org>,
        <pankaj.dubey@samsung.com>
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        <linux-samsung-soc@vger.kernel.org>
In-Reply-To: <20221013104024.50179-2-p.rajanbabu@samsung.com>
Subject: RE: [PATCH v3 1/4] arm64: dts: fix drive strength macros as per FSD
 HW UM
Date:   Fri, 14 Oct 2022 07:08:07 +0530
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>-----Original Message-----
>From: Padmanabhan Rajanbabu =5Bmailto:p.rajanbabu=40samsung.com=5D
>Sent: Thursday, October 13, 2022 4:10 PM
>To: robh+dt=40kernel.org; krzysztof.kozlowski+dt=40linaro.org;
>alim.akhtar=40samsung.com; chanho61.park=40samsung.com;
>linus.walleij=40linaro.org; pankaj.dubey=40samsung.com
>Cc: devicetree=40vger.kernel.org; linux-kernel=40vger.kernel.org; linux-
>samsung-soc=40vger.kernel.org; Padmanabhan Rajanbabu
><p.rajanbabu=40samsung.com>
>Subject: =5BPATCH v3 1/4=5D arm64: dts: fix drive strength macros as per F=
SD HW
>UM
>
>Drive strength macros defined for FSD platform is not reflecting actual na=
mes
>and values as per HW UM. FSD SoC pinctrl has following four levels of driv=
e-
>strength and their corresponding values:
>Level-1 <-> 0
>Level-2 <-> 1
>Level-4 <-> 2
>Level-6 <-> 3
>
>The commit 684dac402f21 (=22arm64: dts: fsd: Add initial pinctrl support=
=22) used
>drive strength macros defined for Exynos4 SoC family. For some IPs the
>macros values of Exynos4 matched and worked well, but Exynos4 SoC family
>drive-strength (names and values) is not exactly matching with FSD SoC.
>
>Fix the drive strength macros to reflect actual names and values given in =
FSD
>HW UM.
>
>Fixes: 684dac402f21 (=22arm64: dts: fsd: Add initial pinctrl support=22)
>Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu=40samsung.com>
>---

Reviewed-by: Alim Akhtar <alim.akhtar=40samsung.com>

Thanks=21

> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi =7C 8 ++++----
> arch/arm64/boot/dts/tesla/fsd-pinctrl.h    =7C 6 +++---
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>index d0abb9aa0e9e..4e151d419909 100644
>--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>=40=40 -55,14 +55,14 =40=40
> 		samsung,pins =3D =22gpf5-0=22;
> 		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud =3D <FSD_PIN_PULL_NONE>;
>-		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> 	=7D;
>
> 	ufs_refclk_out: ufs-refclk-out-pins =7B
> 		samsung,pins =3D =22gpf5-1=22;
> 		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud =3D <FSD_PIN_PULL_NONE>;
>-		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> 	=7D;
> =7D;
>
>=40=40 -239,14 +239,14 =40=40
> 		samsung,pins =3D =22gpb6-1=22;
> 		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud =3D <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> 	=7D;
>
> 	pwm1_out: pwm1-out-pins =7B
> 		samsung,pins =3D =22gpb6-5=22;
> 		samsung,pin-function =3D <FSD_PIN_FUNC_2>;
> 		samsung,pin-pud =3D <FSD_PIN_PULL_UP>;
>-		samsung,pin-drv =3D <FSD_PIN_DRV_LV2>;
>+		samsung,pin-drv =3D <FSD_PIN_DRV_LV4>;
> 	=7D;
>
> 	hs_i2c0_bus: hs-i2c0-bus-pins =7B
>diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>index 6ffbda362493..c397d02208a0 100644
>--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h
>=40=40 -16,9 +16,9 =40=40
> =23define FSD_PIN_PULL_UP			3
>
> =23define FSD_PIN_DRV_LV1			0
>-=23define FSD_PIN_DRV_LV2			2
>-=23define FSD_PIN_DRV_LV3			1
>-=23define FSD_PIN_DRV_LV4			3
>+=23define FSD_PIN_DRV_LV2			1
>+=23define FSD_PIN_DRV_LV4			2
>+=23define FSD_PIN_DRV_LV6			3
>
> =23define FSD_PIN_FUNC_INPUT		0
> =23define FSD_PIN_FUNC_OUTPUT		1
>--
>2.17.1