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Fri, 14 Oct 2022 17:44:10 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id ABDEA10002A; Fri, 14 Oct 2022 17:44:05 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A651E237D96; Fri, 14 Oct 2022 17:44:05 +0200 (CEST) Received: from [10.48.0.213] (10.75.127.50) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Fri, 14 Oct 2022 17:44:04 +0200 Message-ID: Date: Fri, 14 Oct 2022 17:44:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH 1/2] nvmem: stm32: add warning when upper OTPs are updated Content-Language: en-US To: Srinivas Kandagatla , Maxime Coquelin , Alexandre Torgue CC: , , References: <20221014170426.1.Ifa806ff30d7c669ba9a3df9c6b64698a2dcc073a@changeid> From: Patrick DELAUNAY In-Reply-To: <20221014170426.1.Ifa806ff30d7c669ba9a3df9c6b64698a2dcc073a@changeid> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-14_09,2022-10-14_01,2022-06-22_01 X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,NICE_REPLY_A,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 10/14/22 17:04, Patrick Delaunay wrote: > As the upper OTPs are ECC protected, they support only one 32 bits word > programming. > For a second modification of this word, these ECC become invalid and > this OTP will be no more accessible, the shadowed value is invalid. > > This patch adds a warning to indicate an upper OTP update, because this > operation is dangerous as OTP is not locked by the driver after the first > update to avoid a second update. > > Signed-off-by: Patrick Delaunay > --- > > drivers/nvmem/stm32-romem.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c > index 354be526897f..e3c3c333b5d1 100644 > --- a/drivers/nvmem/stm32-romem.c > +++ b/drivers/nvmem/stm32-romem.c > @@ -133,6 +133,9 @@ static int stm32_bsec_write(void *context, unsigned int offset, void *buf, > } > } > > + if (offset + bytes >= priv->lower * 4) Here I miss a dependency for "priv->lower" with a other preliminary patch for STM32MP13x support. > + dev_warn(dev, "Update of upper OTPs with ECC protection (word programming, only once)\n"); > + > return 0; > } > Sorry, I will sent a V2 soon Patrick