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([2601:42:0:3450:9477:c2f0:ddea:ea08]) by smtp.gmail.com with ESMTPSA id y11-20020ac8524b000000b0039bde72b14asm3955078qtn.92.2022.10.15.08.02.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 15 Oct 2022 08:02:15 -0700 (PDT) Message-ID: <432a24ba-5472-20c8-397f-387e5a1ad9d2@linaro.org> Date: Sat, 15 Oct 2022 11:02:13 -0400 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.2 Subject: Re: [PATCH v2 1/6] dt-bindings: clock: Add QDU1000 and QRU1000 GCC clock bindings Content-Language: en-US To: Melody Olvera , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner , Marc Zyngier Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20221014221011.7360-1-quic_molvera@quicinc.com> <20221014221011.7360-2-quic_molvera@quicinc.com> From: Krzysztof Kozlowski In-Reply-To: <20221014221011.7360-2-quic_molvera@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/10/2022 18:10, Melody Olvera wrote: > Add device tree bindings for global clock controller on QDU1000 and > QRU1000 SoCs. > > Signed-off-by: Melody Olvera > --- > .../bindings/clock/qcom,gcc-qdu1000.yaml | 70 ++++++++ > include/dt-bindings/clock/qcom,gcc-qdu1000.h | 170 ++++++++++++++++++ > 2 files changed, 240 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml > create mode 100644 include/dt-bindings/clock/qcom,gcc-qdu1000.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml > new file mode 100644 > index 000000000000..b0746669e2ad > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qdu1000.yaml > @@ -0,0 +1,70 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,gcc-qdu1000.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000 > + > +maintainers: > + - Melody Olvera > + > +description: | > + Qualcomm global clock control module which supports the clocks, resets and > + power domains on QDU1000 and QRU1000 > + > + See also: > + - include/dt-bindings/clock/qcom,gcc-qdu1000.h > + > +properties: > + compatible: > + enum: > + - qcom,gcc-qdu1000 > + - qcom,gcc-qru1000 > + > + clocks: > + items: > + - description: Board XO source > + - description: Sleep clock source > + - description: PCIE 0 Pipe clock source > + - description: PCIE 0 Phy Auxiliary clock source > + - description: USB3 Phy wrapper pipe clock source > + minItems: 2 > + > + clock-names: > + items: > + - const: bi_tcxo > + - const: sleep_clk > + - const: pcie_0_pipe_clk This does not match your clocks, please test your bindings. I thought you understood my comment when you confirmed misunderstanding... Best regards, Krzysztof