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From:   Siarhei Volkau <lis8215@gmail.com>
Date:   Sun, 16 Oct 2022 21:39:48 +0300
Message-ID: <CAKNVLfbePJQN07GfhqAs-opm23poWsL0o-DkV=n-f9+H7Y7rpg@mail.gmail.com>
Subject: Re: [PATCH 7/8] serial: 8250/ingenic: Add support for the
 JZ4750/JZ4755 SoCs
To:     Paul Cercueil <paul@crapouillou.net>
Cc:     Arnd Bergmann <arnd@arndb.de>, kernel test robot <lkp@intel.com>,
        kbuild-all@lists.01.org,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Vinod Koul <vkoul@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Linus Walleij <linus.walleij@linaro.org>,
        Jiri Slaby <jirislaby@kernel.org>, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        dmaengine@vger.kernel.org, linux-serial@vger.kernel.org,
        linux-mips@vger.kernel.org,
        GPIO SUBSYSTEM <linux-gpio@vger.kernel.org>
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=D1=87=D1=82, 13 =D0=BE=D0=BA=D1=82. 2022 =D0=B3. =D0=B2 21:56, Siarhei Vol=
kau <lis8215@gmail.com>:

> > Just disable the divider in ingenic_fixup_fdt() in

> I'll check that.

I checked that approach: serial seems to be working as expected,
but not all the time: there's a time period when the CGU driver
started but serial console driver is still early one.
In my case UART produces garbage at that period since CGU
needs to enable clock divider back: ext is 24MHz but 12MHz
required for audio codec and USB to function properly.

So I think Arnd's approach:

> the hardware should already be in a working state,
> with no need to touch it during early boot.

shall resolve the problem, although I can't check it on all supported
hardware.

BR,
Siarhei