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Date:   Mon, 17 Oct 2022 09:18:20 +0200
From:   =?UTF-8?B?Q2zDqW1lbnQgTMOpZ2Vy?= <clement.leger@bootlin.com>
To:     Frank Rowand <frowand.list@gmail.com>
Cc:     Rob Herring <robh@kernel.org>, Lizhi Hou <lizhi.hou@amd.com>,
        linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, helgaas@kernel.org, max.zhen@amd.com,
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        "Horatiu.Vultur@microchip.com" <Horatiu.Vultur@microchip.com>,
        "Allan.Nielsen@microchip.com" <Allan.Nielsen@microchip.com>,
        Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
        Alexandre Belloni <alexandre.belloni@bootlin.com>
Subject: Re: [PATCH RFC 0/2] Generate device tree node for pci devicesgain,
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Le Fri, 14 Oct 2022 13:52:50 -0500,
Frank Rowand <frowand.list@gmail.com> a =C3=A9crit :

> On 10/14/22 12:33, Rob Herring wrote:
> > On Thu, Oct 13, 2022 at 12:28 PM Frank Rowand <frowand.list@gmail.com> =
wrote: =20
> >>
> >> On 10/13/22 03:02, Cl=C3=A9ment L=C3=A9ger wrote: =20
> >>> Le Thu, 13 Oct 2022 01:05:26 -0500,
> >>> Frank Rowand <frowand.list@gmail.com> a =C3=A9crit :
> >>> =20
> >>>>> This would also require two different descriptions of the same card
> >>>>> (for ACPI and device-tree) and would require the final user to crea=
te a
> >>>>> specific overlay for its device based on the PCI slots the card is
> >>>>> plugged in. =20
> >>>>
> >>>> One of the many missing pieces of overlay support.  There have been =
several
> >>>> discussion of how to describe a "socket" in a device tree that a dev=
ice
> >>>> could be plugged into, where a single device tree subtree .dtb could=
 be
> >>>> relocated to one or more different socket locations.  Thus in this
> >>>> case a single overlay could be relocated to various PCI slots.
> >>>>
> >>>> I don't expect be getting involved in any future efforts around sock=
ets
> >>>> (see my following comment for why).
> >>>> =20
> >>>>>
> >>>>> The solution we proposed (Lizhi and I) allows to overcome these
> >>>>> problems and is way easier to use. Fixing the potential bugs that m=
ight
> >>>>> exists in the overlay layer seems a way better idea that just pushi=
ng =20
> >>>>
> >>>> It is not potential bugs.  The current run time overlay implementati=
on is
> >>>> proof of concept quality and completeness.  It is not production rea=
dy.
> >>>>
> >>>> I got an opportunity for early retirement a couple of weeks ago.  My=
 first
> >>>> inclination was to continue the same level of device tree maintainer=
ship,
> >>>> but I am quickly realizing that there are other activities that I wo=
uld
> >>>> like to devote my time and energy to.  I will continue to support Ro=
b with
> >>>> minor patch reviews and testing, and potentially finishing up some
> >>>> improvements to unittest.  On the other hand, bringing run time over=
lay
> >>>> support to product quality would be a major investment of my time th=
at I
> >>>> am not willing to continue. =20
> >>>
> >>> Hi Frank,
> >>>
> >>> This explains your position on the overlay support and I can
> >>> certainly understand it ! Regarding the fact that it would enter =20
> >>
> >> No, my position on the technical aspects of overlay support is totally
> >> unchanged.
> >>
> >> The only thing that has changed is that my time will not be available =
to
> >> assist in future overlay related work.  The burden for this will fall
> >> more on Rob than it has in the past. =20
> >=20
> > s/Rob/someone that steps up to maintain the overlay code/
> >  =20
> >>> "production", the devices we are talking about are not really
> >>> widespread yet? This would be a good opportunity to gather feedback
> >>> early and improve the support gradually. We could probably even be ab=
le
> >>> to support improvements in the overlay code if needed I guess. =20
> >>
> >> That is avoiding my point about the current implementation being
> >> proof of concept. =20
> >  =20
>=20
>=20
> > I think it would be better to talk in terms of under what conditions
> > the overlay support is adequate (for production) rather than a blanket
> > statement that it is not-production ready.  =20
>=20
> I sort of agree.  Use of run time overlays has been narrowly supported
> for use by a limited set of very cautious developers in a very constrained
> usage.

As a first working point, could we potentially restrict drivers to only
insert an overlay but not remove it ? It would be quite limited, but
as you pointed out, the multiple load/unload (or FPGA reconfiguration)
will only happen during development. Under "normal" condition, we could
expect the FPGA to be configured once during the system runtime. The
same goes for our PCI card which uses an existing SoC, we can probably
assume that it is going to be plugged once for all during the system
runtime.

This would limit the problems that might happen due to dynamic
insertion/removal of the overlay.

--=20
Cl=C3=A9ment L=C3=A9ger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com