Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Liu Ying <victor.liu@nxp.com>
To:     dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc:     p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de,
        festevam@gmail.com, linux-imx@nxp.com,
        maarten.lankhorst@linux.intel.com, mripard@kernel.org,
        tzimmermann@suse.de, guido.gunther@puri.sm,
        marcel.ziswiler@toradex.com, laurentiu.palcu@oss.nxp.com,
        robh@kernel.org
Subject: [PATCH v12 2/6] dt-bindings: display: imx: Add i.MX8qxp/qm PRG binding
Date:   Mon, 17 Oct 2022 17:23:04 +0800
Message-Id: <20221017092308.249665-3-victor.liu@nxp.com>
In-Reply-To: <20221017092308.249665-1-victor.liu@nxp.com>
References: <20221017092308.249665-1-victor.liu@nxp.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?rCWM8oAydFNmD2BRyYFksq0kTznpWb8O2l94QhP6HCU8cCu7VJ5L5Mx5PSNY?=
 =?us-ascii?Q?iZCJeO+i1sNqeLcc/9PpMoF83w6eUuXIKmqgz+VSM0Bsh8cDYLZ+CdScIJ60?=
 =?us-ascii?Q?w+tTownv2P4dTjhU6fBwdS99gFgngFvyf7L3W5g7SD81fZUuJE49uuHsl4Lm?=
 =?us-ascii?Q?hf5ZySYSKas/bRusvgPD1psgKH0BHHo3CMcnL3Zu5E7cjlhkjyAQnBkV4XEr?=
 =?us-ascii?Q?9LEMojRZcYqIZTU49kVtFDIn+Bajv36HnjEbZGSLdcZvjAQ7a5VS1sANnEf7?=
 =?us-ascii?Q?CuM1/rabf12Zg3R3xIqFLmlgfVUynqJ3dzl2celvbm0D9k6BbW3ss3d+pZM4?=
 =?us-ascii?Q?sJsikFBBXqRm5tljgQsZgT/bF+KPPxW+CZ9Zdev1srTWC7UYPlNTBhdXITsn?=
 =?us-ascii?Q?2+VB34Z6dFLtDROXogTIIpgNxx/H8rBBVz/pCbFpS+rw+nmrxvj708WJMdCr?=
 =?us-ascii?Q?vx3eJvq5xUqczScWhz26oApvH13n2c0f5oKjmOvdaMNkxBtnP4bnaElM5qI/?=
 =?us-ascii?Q?CO8l31ZQppiSyOcrgBUjxzlH24+nzp/lbGL/XjUC9cE4950oUrDhhLZS1ayq?=
 =?us-ascii?Q?nFGL0KUgycJ1/ndK4HSzFI3BAsZyKuqxZ8P3gUR5bfxJfnfflgmYCpR9AnbU?=
 =?us-ascii?Q?C1Gv2chCY1Z53aFbHPMVpZNG+2WPixlr3hgaupmM4nLmHITauE+Ifd7lXlwV?=
 =?us-ascii?Q?EC4czwIkB0lfYds3RLC5+9Lol0y6FeUlmFjUR71Y3iS27R9istC6lxVGNKU4?=
 =?us-ascii?Q?uYz0rrGodu/BqbK1sBFV3gk/1pNG1Btqa8hiQJQyRVxq+J/jHv95SS8iIMgt?=
 =?us-ascii?Q?BzVsue0/4UsZHIQyhXaDrDvGEEAaZF+qu7+QG+zHTLPcDGLJBUDeXO7Wr0z4?=
 =?us-ascii?Q?Puu46whaKJzdhpchCYhnMQWLl22CAiV08K6qnqrg53X7jJGczq34H+eIQkl0?=
 =?us-ascii?Q?HXF5fPWXbnDLBvfMNAstDSwUI4fDOcw85B8SUaicIYIxneGzGEvpH3aA+xYT?=
 =?us-ascii?Q?VD7BxnK/4VEt0o7gWZCExbMrGDnK0mQk8wmSfD92LXB8JC+bsUdPx+1F7/Po?=
 =?us-ascii?Q?H4nQP8zTz/BCRlkAibNFBLaHhLXBWk0sue6sv87xTIbJ6L4CvdcIQbMRB/lX?=
 =?us-ascii?Q?En94BFVePSYu33lzkXKewARF/TOGF6C56SmBIKWnmg22vNXb2NG8BvamPk6l?=
 =?us-ascii?Q?ZUX4ONIr83Sp9M8sD6zFQEUYOYOr2aflJ7Fk9i1tVu/vA695O1y+P24jId80?=
 =?us-ascii?Q?GTCttprpeVr+Pcc979NBNZ/UTW7D50V/xp7qgMVN01Jh7kAYq7uTQHYs3zsE?=
 =?us-ascii?Q?gQFeOrcRnroAtZncK0sjRFsj4AweKJ05U3eOr+sF31RJFeqXNsqtb+OsMQht?=
 =?us-ascii?Q?BgEDrnvwpVECRg953bAcymy5Vp+8FFTaHUCVn0b3gQWnY+TC8iKdH8pVtJV8?=
 =?us-ascii?Q?IKMV6IqbVinZwe+WqutU9hg6/42dxUKEtOEiuHycjss/uHgMpkekeEA/cYEy?=
 =?us-ascii?Q?GQg59SInRiAzZIw78HQ6+WocijTmkmyY2a/YjBPEsHh4NdjY+WXS0ZwEXtvG?=
 =?us-ascii?Q?LwuvUe4KatEL73vbG+FjqhChdeXQEthY8zx//BGJ?=
X-OriginatorOrg: nxp.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 371a22cc-236a-47d4-3765-08dab0210bb3
X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2022 09:22:00.4938
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: aKmXjvyjRm8vk6zhXpwCC+XqfLfD86KPvLlYWuMmezTP6hNxsAg6/HZy1qT8WiBqZnyNOlBmR38zVsLRdX/Shg==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB7188
X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,
        DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE,
        RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham
        autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

This patch adds bindings for i.MX8qxp/qm Display Prefetch Resolve Gasket.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
v4->v12:
* No change.

v3->v4:
* Improve compatible property by using enum instead of oneOf+const. (Rob)
* Add Rob's R-b tag.

v2->v3:
* No change.

v1->v2:
* Use new dt binding way to add clocks in the example.

 .../bindings/display/imx/fsl,imx8qxp-prg.yaml | 60 +++++++++++++++++++
 1 file changed, 60 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml

diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml
new file mode 100644
index 000000000000..3ff46e0d4e73
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-prg.yaml
@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-prg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX8qm/qxp Display Prefetch Resolve Gasket
+
+maintainers:
+  - Liu Ying <victor.liu@nxp.com>
+
+description: |
+  The i.MX8qm/qxp Prefetch Resolve Gasket (PRG) is a gasket interface between
+  RTRAM controller and Display Controller.  The main function is to convert
+  the AXI interface to the RTRAM interface, which includes re-mapping the
+  ARADDR to a RTRAM address.
+
+properties:
+  compatible:
+    enum:
+      - fsl,imx8qxp-prg
+      - fsl,imx8qm-prg
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: rtram clock
+      - description: apb clock
+
+  clock-names:
+    items:
+      - const: rtram
+      - const: apb
+
+  power-domains:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - power-domains
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8-lpcg.h>
+    #include <dt-bindings/firmware/imx/rsrc.h>
+    prg@56040000 {
+        compatible = "fsl,imx8qxp-prg";
+        reg = <0x56040000 0x10000>;
+        clocks = <&dc0_prg0_lpcg IMX_LPCG_CLK_0>,
+                 <&dc0_prg0_lpcg IMX_LPCG_CLK_4>;
+        clock-names = "rtram", "apb";
+        power-domains = <&pd IMX_SC_R_DC_0>;
+    };
-- 
2.37.1