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From:   "Gupta, Nipun" <Nipun.Gupta@amd.com>
To:     Rob Herring <robh@kernel.org>
CC:     "krzysztof.kozlowski+dt@linaro.org" 
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        <linux-arm-kernel@lists.infradead.org>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
        "okaya@kernel.org" <okaya@kernel.org>,
        "Anand, Harpreet" <harpreet.anand@amd.com>,
        "Agarwal, Nikhil" <nikhil.agarwal@amd.com>,
        "Simek, Michal" <michal.simek@amd.com>,
        "Radovanovic, Aleksandar" <aleksandar.radovanovic@amd.com>,
        "git (AMD-Xilinx)" <git@amd.com>
Subject: RE: [RFC PATCH v4 1/8] dt-bindings: bus: add CDX bus device tree
 bindings
Thread-Topic: [RFC PATCH v4 1/8] dt-bindings: bus: add CDX bus device tree
 bindings
Thread-Index: AQHY34c5Cs6Z3QFBAEavcy1n9c9+Qa4N8EWAgARxhtA=
Date:   Mon, 17 Oct 2022 10:18:48 +0000
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References: <20220803122655.100254-1-nipun.gupta@amd.com>
 <20221014044049.2557085-1-nipun.gupta@amd.com>
 <20221014044049.2557085-2-nipun.gupta@amd.com>
 <20221014141717.GB1862711-robh@kernel.org>
In-Reply-To: <20221014141717.GB1862711-robh@kernel.org>
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[AMD Official Use Only - General]


> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Friday, October 14, 2022 7:47 PM
> To: Gupta, Nipun <Nipun.Gupta@amd.com>
> Cc: krzysztof.kozlowski+dt@linaro.org; gregkh@linuxfoundation.org;
> rafael@kernel.org; eric.auger@redhat.com; alex.williamson@redhat.com;
> cohuck@redhat.com; Gupta, Puneet (DCG-ENG) <puneet.gupta@amd.com>;
> song.bao.hua@hisilicon.com; mchehab+huawei@kernel.org; maz@kernel.org;
> f.fainelli@gmail.com; jeffrey.l.hugo@gmail.com; saravanak@google.com;
> Michael.Srba@seznam.cz; mani@kernel.org; yishaih@nvidia.com;
> jgg@ziepe.ca; jgg@nvidia.com; robin.murphy@arm.com; will@kernel.org;
> joro@8bytes.org; masahiroy@kernel.org; ndesaulniers@google.com; linux-arm=
-
> kernel@lists.infradead.org; linux-kbuild@vger.kernel.org; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; kvm@vger.kernel.org;
> okaya@kernel.org; Anand, Harpreet <harpreet.anand@amd.com>; Agarwal,
> Nikhil <nikhil.agarwal@amd.com>; Simek, Michal <michal.simek@amd.com>;
> Radovanovic, Aleksandar <aleksandar.radovanovic@amd.com>; git (AMD-Xilinx=
)
> <git@amd.com>
> Subject: Re: [RFC PATCH v4 1/8] dt-bindings: bus: add CDX bus device tree
> bindings
>=20
> Caution: This message originated from an External Source. Use proper caut=
ion
> when opening attachments, clicking links, or responding.
>=20
>=20
> On Fri, Oct 14, 2022 at 10:10:42AM +0530, Nipun Gupta wrote:
> > This patch adds a devicetree binding documentation for CDX
> > bus.
>=20
> Please read submitting-patches.rst and what it says about commit
> messages.

Thanks for pointing. I had a look at the file and will update accordingly

>=20
> >
> > Signed-off-by: Nipun Gupta <nipun.gupta@amd.com>
> > ---
> >  .../devicetree/bindings/bus/xlnx,cdx.yaml     | 65 +++++++++++++++++++
> >  MAINTAINERS                                   |  6 ++
> >  2 files changed, 71 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> > new file mode 100644
> > index 000000000000..984ff65b668a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> > @@ -0,0 +1,65 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id:
> https://nam11.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdevice=
tre
> e.org%2Fschemas%2Fbus%2Fxlnx%2Ccdx.yaml%23&amp;data=3D05%7C01%7Cnip
> un.gupta%40amd.com%7C16a836a178fa4e373c9308daadeecd32%7C3dd8961f
> e4884e608e11a82d994e183d%7C0%7C0%7C638013538406495866%7CUnknow
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haW
> wiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;sdata=3D44F%2Bw51YMeCyE78g
> 3EmevxqYx%2FybbeKdlkDv1X6XDcM%3D&amp;reserved=3D0
> > +$schema:
> https://nam11.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdevice=
tre
> e.org%2Fmeta-
> schemas%2Fcore.yaml%23&amp;data=3D05%7C01%7Cnipun.gupta%40amd.com%
> 7C16a836a178fa4e373c9308daadeecd32%7C3dd8961fe4884e608e11a82d994e
> 183d%7C0%7C0%7C638013538406495866%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 3000%7C%7C%7C&amp;sdata=3DFPADx3bdmJg%2BfnEs%2BUtNTMPo3U1aiX3wv
> w57EQvleK4%3D&amp;reserved=3D0
> > +
> > +title: AMD CDX bus controller
> > +
> > +description: |
> > +  CDX bus controller detects CDX devices using CDX firmware and
> > +  add those to cdx bus. The CDX bus manages multiple FPGA based
> > +  hardware devices, which can support network, crypto or any other
> > +  specialized type of devices. These FPGA based devices can be
> > +  added/modified dynamically on run-time.
> > +
> > +  All devices on the CDX bus will have a unique streamid (for IOMMU)
> > +  and a unique device ID (for MSI) corresponding to a requestor ID
> > +  (one to one associated with the device). The streamid and deviceid
> > +  are used to configure SMMU and GIC-ITS respectively.
> > +
> > +  iommu-map property is used to define the set of stream ids
> > +  corresponding to each device and the associated IOMMU.
> > +
> > +  The MSI writes are accompanied by sideband data (Device ID).
> > +  The msi-map property is used to associate the devices with the
> > +  device ID as well as the associated ITS controller.
> > +
> > +maintainers:
> > +  - Nipun Gupta <nipun.gupta@amd.com>
> > +  - Nikhil Agarwal <nikhil.agarwal@amd.com>
> > +
> > +properties:
> > +  compatible:
> > +    const: xlnx,cdxbus-controller-1.0
>=20
> Where does 1.0 come from?

This came up in internal review comment, but seems that there is no need fo=
r
having the controller versioning. We will remove in the next set of patches=
.

>=20
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  iommu-map: true
> > +
> > +  msi-map: true
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - iommu-map
> > +  - msi-map
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    soc {
> > +        #address-cells =3D <2>;
> > +        #size-cells =3D <2>;
> > +
> > +        cdx: cdx@4000000 {
>=20
> bus@...

Sure. Will update.

Thanks,
Nipun

>=20
> > +            compatible =3D "xlnx,cdxbus-controller-1.0";
> > +            reg =3D <0x00000000 0x04000000 0 0x1000>;
> > +            /* define map for RIDs 250-259 */
> > +            iommu-map =3D <250 &smmu 250 10>;
> > +            /* define msi map for RIDs 250-259 */
> > +            msi-map =3D <250 &its 250 10>;
> > +        };
> > +    };
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index f5ca4aefd184..5f48f11fe0c3 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -935,6 +935,12 @@ S:       Supported
> >  F:   drivers/crypto/ccp/
> >  F:   include/linux/ccp.h
> >
> > +AMD CDX BUS DRIVER
> > +M:   Nipun Gupta <nipun.gupta@amd.com>
> > +M:   Nikhil Agarwal <nikhil.agarwal@amd.com>
> > +S:   Maintained
> > +F:   Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
> > +
> >  AMD CRYPTOGRAPHIC COPROCESSOR (CCP) DRIVER - SEV SUPPORT
> >  M:   Brijesh Singh <brijesh.singh@amd.com>
> >  M:   Tom Lendacky <thomas.lendacky@amd.com>
> > --
> > 2.25.1
> >
> >