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Date:   Mon, 17 Oct 2022 13:37:11 +0000
To:     Marijn Suijten <marijn.suijten@somainline.org>,
        Abhinav Kumar <quic_abhinavk@quicinc.com>
From:   Caleb Connolly <caleb@connolly.tech>
Cc:     phone-devel@vger.kernel.org, Vinod Koul <vkoul@kernel.org>,
        Jami Kettunen <jami.kettunen@somainline.org>,
        David Airlie <airlied@gmail.com>,
        linux-arm-msm@vger.kernel.org,
        Vladimir Lypak <vladimir.lypak@gmail.com>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        dri-devel@lists.freedesktop.org,
        Douglas Anderson <dianders@chromium.org>,
        Rob Clark <robdclark@gmail.com>,
        Martin Botka <martin.botka@somainline.org>,
        ~postmarketos/upstreaming@lists.sr.ht,
        Daniel Vetter <daniel@ffwll.ch>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@somainline.org>,
        Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
        freedreno@lists.freedesktop.org, Sean Paul <sean@poorly.run>,
        linux-kernel@vger.kernel.org, Newbyte <newbie13xd@gmail.com>
Subject: Re: [Freedreno] [PATCH v3 06/10] drm/msm/dsi: Migrate to drm_dsc_compute_rc_parameters()
Message-ID: <0642a664-3eed-21b7-a417-c6c607908f51@connolly.tech>
In-Reply-To: <20221017085944.2r24uqg73irmziqm@SoMainline.org>
References: <20221009184824.457416-1-marijn.suijten@somainline.org> <20221009185058.460688-1-marijn.suijten@somainline.org> <5c178d7e-5022-f5e5-791d-d3800114b42b@quicinc.com> <20221013093646.c65mbjc6oekd7gha@SoMainline.org> <32af4444-9c88-eb0f-eda7-24fa0418aff6@quicinc.com> <20221017085944.2r24uqg73irmziqm@SoMainline.org>
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On 17/10/2022 09:59, Marijn Suijten wrote:
> On 2022-10-13 09:02:44, Abhinav Kumar wrote:
>> On 10/13/2022 2:36 AM, Marijn Suijten wrote:
>>> On 2022-10-12 16:03:06, Abhinav Kumar wrote:
>>>> [..]
>>>> But I would like to hold back this change till Vinod clarifies because
>>>> Vinod had mentioned that with drm_dsc_compute_rc_parameters() he was
>>>> seeing a mismatch in the computation of two values.
>>>>
>>>> slice_bpg_offset and the final_offset.
>>>
>>> Unsurprisingly so because final_offset, and slice_bpg_offset through
>>> initial_offset depend directly on bits_per_pixel.  The main takeaway of
>>> this series is that Vinod was interpreting this field as integer instea=
d
>>> of containing 4 fractional bits.  If he updates his the panel driver [1=
]
>>> to set bits_per_pixel =3D 8 << 4 instead of just 8 to account for this,
>>> the values should check out once again.
>>>
>>> [1]: https://git.linaro.org/people/vinod.koul/kernel.git/commit/?h=3Dto=
pic/pixel3_5.18-rc1&id=3D1d7d98ad564f1ec69e7525e07418918d90f247a1
>>>
>>> Once Vinod (or someone else in the posession of a Pixel 3) confirms
>>> this, I can respin this series and more explicitly explain why the FIXM=
E
>>> was put in place, instead of being resolved outright?
>>>
>>> - Marijn
>>
>> Makes perfect sense to me.
>>
>> Will just wait for Vinod's tested-by.
>
> Unfortunately Vinod doesn't have access to this device anymore, but
> Caleb recently sent the support series including display driver for
> Pixel 3 and is picking up the testing.  User "Newbyte" from #linux-msm
> promised to test on the LG G7 to have even more input samples.

Hi,

I'm hoping to pick the Pixel 3 stuff back up at some point, but right now t=
here
seem to be quite a few issues outside of DSC which make testing it a bit of=
 a pain.

I gave Marijn's series [1] a go but wasn't able to get anything usable out =
of the
panel, however I doubt this is a DSC issue as I've always needed some hacks=
 to
get the panel working - I've never had any success with it without skipping=
 both
the initial panel reset and sending the PPS payload.

I think if Marijn has managed to initialise a panel properly then the lack =
of
Pixel 3 for validation shouldn't be a blocker to merge these fixes.

[1]:
https://lore.kernel.org/linux-arm-msm/20221009184824.457416-1-marijn.suijte=
n@somainline.org/

>
> - Marijn

--
Kind Regards,
Caleb