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[2620:137:e000::1:20]) by mx.google.com with ESMTP id v5-20020a17090606c500b0072b1964e54esi8499721ejb.1007.2022.10.17.07.33.38; Mon, 17 Oct 2022 07:34:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=ChQ48xbw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230336AbiJQOU3 (ORCPT + 99 others); Mon, 17 Oct 2022 10:20:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230314AbiJQOUY (ORCPT ); Mon, 17 Oct 2022 10:20:24 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1083F5B7B9; Mon, 17 Oct 2022 07:20:21 -0700 (PDT) X-UUID: 9cac9a65c168484abf404c38ca669c74-20221017 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=SCTfi8EohP0/f/dHHu5qpABoBPiRJzFOeNfn7nLzrEY=; b=ChQ48xbwQoffs2pVw5xsHQB1p2ZiyK7ymxsB2HU7eyz88Z0n1Nq5mp2NL6SJEK3CgdsUISZBnbGEctTjBg2oCDkR6mCmrRxklFgHU9ATCibStazGWULRldx2itReRLk6to58gKtL0PmwdFA38BAH+yvhcYE7dvcqF+Ke7+HjRZk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:a10657d5-d32c-45a8-bcb4-074bd6056c53,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:39a5ff1,CLOUDID:18d80aa4-ebb2-41a8-a87c-97702aaf2e20,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 9cac9a65c168484abf404c38ca669c74-20221017 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1120127280; Mon, 17 Oct 2022 22:20:15 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 17 Oct 2022 22:20:14 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 17 Oct 2022 22:20:13 +0800 From: Mengqi Zhang To: , , , , , CC: , , , , , Mengqi Zhang Subject: [PATCH 2/2] dt-bingdings: mmc: Mediatek: add ICE clock Date: Mon, 17 Oct 2022 22:20:07 +0800 Message-ID: <20221017142007.5408-3-mengqi.zhang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221017142007.5408-1-mengqi.zhang@mediatek.com> References: <20221017142007.5408-1-mengqi.zhang@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document the binding for crypto clock of the Inline Crypto Engine of Mediatek SoCs. Signed-off-by: Mengqi Zhang --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index d8e1e2e9adf2..f93d686e2911 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -57,6 +57,7 @@ properties: - description: peripheral bus clock gate (required for MT8192). - description: AXI bus clock gate (required for MT8192). - description: AHB bus clock gate (required for MT8192). + - description: crypto clock used for data encrypt/decrypt (optional). clock-names: minItems: 2 @@ -69,6 +70,7 @@ properties: - const: pclk_cg - const: axi_cg - const: ahb_cg + - const: crypto interrupts: description: -- 2.25.1