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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 9-20020a170906308900b0077fd6028710si9838632ejv.670.2022.10.17.16.03.18; Mon, 17 Oct 2022 16:03:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fR2jHtQz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230403AbiJQWal (ORCPT + 99 others); Mon, 17 Oct 2022 18:30:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229994AbiJQWaW (ORCPT ); Mon, 17 Oct 2022 18:30:22 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 586A08263C; Mon, 17 Oct 2022 15:30:09 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0B815B81B37; Mon, 17 Oct 2022 22:29:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9D71DC433C1; Mon, 17 Oct 2022 22:29:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1666045741; bh=a0hL4DAeU1uv9+yPBashvADErL0rcOpOfClpiG5iyJU=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=fR2jHtQzIpr4Uo8B1sFIglt9bmHNiGUckCOd6dd2HFnOva6qD1cyvEMzH3KVcotJ1 B2NzcG+z7iElo1R0kLDYU7ptO3GuqL3KuRPvmgLaW3kPPvErBcPT74/C9t7tWqGkjt kmRslexsGUxhPasjAduMYPG3yrnOnyoz2FPQDvwD2zAyfgO2Iinnm2jljKAytSPjza mcHjPsSLTaMEPHNTb039+Dh6jYL8a3QJ5vT6wPPf9bsKUD9fdjo4J3D2aB3khe4Fel 5/veLdB+RmvJ/7V3aZPAUTp8TUfkKH6lYg5Uikdq0/KVjNIv+42UaSlXlIOCo9Z7RR Zp99bDMLAGhXQ== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: References: Subject: Re: [PATCH v4 3/4] clk: mxl: Add option to override gate clks From: Stephen Boyd Cc: linux-kernel@vger.kernel.org, linux-lgm-soc@maxlinear.com, Rahul Tanwar To: Rahul Tanwar , linux-clk@vger.kernel.org, mturquette@baylibre.com, yzhu@maxlinear.com Date: Mon, 17 Oct 2022 15:28:59 -0700 User-Agent: alot/0.10 Message-Id: <20221017222901.9D71DC433C1@smtp.kernel.org> X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Rahul Tanwar (2022-10-12 23:48:32) > In MxL's LGM SoC, gate clocks can be controlled either from CGU clk driver > i.e. this driver or directly from power management driver/daemon. It is > dependent on the power policy/profile requirements of the end product. >=20 > To support such use cases, provide option to override gate clks enable/di= sable > by adding a flag GATE_CLK_HW which controls if these gate clks are contro= lled > by HW i.e. this driver or overridden in order to allow it to be controlled > by power profiles instead. >=20 > Reviewed-by: Yi xin Zhu > Signed-off-by: Rahul Tanwar > --- Applied to clk-next