Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
References: <20221017125209.2639531-1-chenhuacai@loongson.cn>
 <39ea2a6fee654b68974ef38237a61e80@AcuMS.aculab.com> <b31086df86febba62f76ff9ec775b7a6e16c1933.camel@xry111.site>
In-Reply-To: <b31086df86febba62f76ff9ec775b7a6e16c1933.camel@xry111.site>
From:   Huacai Chen <chenhuacai@kernel.org>
Date:   Tue, 18 Oct 2022 09:59:09 +0800
Message-ID: <CAAhV-H5XoJqbnh+DzX0Gsq_sDTLB7bK9H7-=fLTPuA4s7VY+Ug@mail.gmail.com>
Subject: Re: [PATCH V3] LoongArch: Add unaligned access support
To:     Xi Ruoyao <xry111@xry111.site>
Cc:     David Laight <David.Laight@aculab.com>,
        Huacai Chen <chenhuacai@loongson.cn>,
        Arnd Bergmann <arnd@arndb.de>,
        "loongarch@lists.linux.dev" <loongarch@lists.linux.dev>,
        "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>,
        Xuefeng Li <lixuefeng@loongson.cn>,
        Guo Ren <guoren@kernel.org>, Xuerui Wang <kernel@xen0n.name>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

On Mon, Oct 17, 2022 at 10:20 PM Xi Ruoyao <xry111@xry111.site> wrote:
>
> On Mon, 2022-10-17 at 13:11 +0000, David Laight wrote:
> > From: Huacai Chen
> > > Sent: 17 October 2022 13:52
> > >
> > > Loongson-2 series (Loongson-2K500, Loongson-2K1000) don't support
> > > unaligned access in hardware, while Loongson-3 series (Loongson-3A5000,
> > > Loongson-3C5000) are configurable whether support unaligned access in
> > > hardware. This patch add unaligned access emulation for those LoongArch
> > > processors without hardware support.
> > >
> > .....
> > > +       } else if (insn.reg2i12_format.opcode == fstd_op ||
> > > +               insn.reg3_format.opcode == fstxd_op) {
> > > +               value = read_fpr(insn.reg2i12_format.rd);
> > > +               res = unaligned_write(addr, value, 8);
> > > +               if (res)
> > > +                       goto fault;
> > > +       } else if (insn.reg2i12_format.opcode == fsts_op ||
> > > +               insn.reg3_format.opcode == fstxs_op) {
> > > +               value = read_fpr(insn.reg2i12_format.rd);
> > > +               res = unaligned_write(addr, value, 4);
> > > +               if (res)
> > > +                       goto fault;
> >
> > Are those right?
> > Shouldn't something be converting from 'double' to
> > 'float' in there?
> > And generating SIGFPE (?) if the exponent is out of range.
>
> To me it looks right.
>
> The semantic of FST.S does not include conversion.  It just stores the
> lower 32 bits of a floating-point register into the memory.  If someone
> attempts to use FST.S to convert a double into a float, it's a
> programming error.
Agree.

>
> --
> Xi Ruoyao <xry111@xry111.site>
> School of Aerospace Science and Technology, Xidian University