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From:   Bjorn Andersson <andersson@kernel.org>
To:     Sivaprakash Murugesan <sivaprak@codeaurora.org>,
        stephan@gerhold.net, linux-gpio@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        agross@kernel.org, krzysztof.kozlowski@linaro.org,
        linus.walleij@linaro.org, vkoul@kernel.org, shawn.guo@linaro.org,
        robh+dt@kernel.org, linux-arm-msm@vger.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        quic_vamslank@quicinc.com,
        Konrad Dybcio <konrad.dybcio@somainline.org>
Subject: Re: (subset) [PATCH v5 00/34] pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings (third set)
Date:   Mon, 17 Oct 2022 22:05:44 -0500
Message-Id: <166606235863.3553294.2899134058558070077.b4-ty@kernel.org>
In-Reply-To: <20221016170035.35014-1-krzysztof.kozlowski@linaro.org>
References: <20221016170035.35014-1-krzysztof.kozlowski@linaro.org>
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On Sun, 16 Oct 2022 13:00:01 -0400, Krzysztof Kozlowski wrote:
> Changes since v4
> ================
> 1. Drop drive-strength (included by common TLMM node).
> 
> Changes since v3
> ================
> 1. All patches with subject: "use common TLMM schema":
>    Drop properties and required items which are already provided by common TLMM
>    schema.
>    The change against v3 is non-trivial, however I retained reviewed-by tags.
> 2. Add Rb tags.
> 
> [...]

Applied, thanks!

[03/34] ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
        commit: 0139f183bcddcf5b36f805254bb0f0625963f783
[04/34] ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
        commit: bda79af488a3e75769433fb961800c39bb07b29c
[05/34] ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
        commit: df9c86025510c45a6d90669347129e8000e1bbbc
[06/34] ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
        commit: 6cd72414abc7345e277fcab5e1c763c3a017dc6a

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>