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[106.167.171.201]) by smtp.gmail.com with ESMTPSA id r16-20020a63e510000000b004308422060csm7304780pgh.69.2022.10.18.00.40.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 18 Oct 2022 00:40:11 -0700 (PDT) Message-ID: Date: Tue, 18 Oct 2022 16:40:06 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v4] locking/memory-barriers.txt: Improve documentation for writel() example To: Arnd Bergmann , Parav Pandit Cc: bagasdotme@gmail.com, Alan Stern , parri.andrea@gmail.com, Will Deacon , Peter Zijlstra , boqun.feng@gmail.com, Nicholas Piggin , dhowells@redhat.com, j.alglave@ucl.ac.uk, luc.maranget@inria.fr, "Paul E. McKenney" , dlustig@nvidia.com, Joel Fernandes , Jonathan Corbet , linux-kernel@vger.kernel.org, Linux-Arch , linux-doc@vger.kernel.org, Akira Yokosawa References: <20221010101331.29942-1-parav@nvidia.com> <59d99be6-f79e-45bd-203c-17972255cc39@gmail.com> <12f51033-1461-43f9-8d8d-cd726fbb4758@app.fastmail.com> Content-Language: en-US From: Akira Yokosawa In-Reply-To: <12f51033-1461-43f9-8d8d-cd726fbb4758@app.fastmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 18 Oct 2022 08:44:09 +0200, Arnd Bergmann wrote: > On Tue, Oct 18, 2022, at 3:37 AM, Akira Yokosawa wrote: >> On 2022/10/18 5:55, Arnd Bergmann wrote: >>> On Mon, Oct 10, 2022, at 12:13 PM, Parav Pandit wrote: >> >> "a barrier" can mean "any barrier", which can include a full barrier >> in theory. >> >> So I'd rather make the substituted text read something like: >> >> Note that, when using writel(), a prior wmb() or weaker is not >> needed to guarantee that the cache coherent memory writes have >> completed before writing to the MMIO region. >> >> In my opinion, "or weaker" is redundant for careful readers who are >> well aware of context of this example, but won't do no harm. > > I think that would be more confusing than either of the other variants. > > Anything weaker than a full "wmb()" probably makes the driver calling > the writel() non-portable, so that is both vague and incorrect. Do you mean there is a writel() implementation somewhere in the kernel which doesn't guarantee an implicit wmb() before MMIO write? Or do you mean my version is confusing because it can imply a weaker write barrier is sufficient before writel_relaxed()? I'm confused... Thanks, Akira > > The current version works because it specifically mentions the correct > barrier to use, while Parav's version works because it doesn't > make any attempt to name the specific barrier and just states that > adding one is a bad idea regardless. > > Arnd