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From:   Heiko Stuebner <heiko@sntech.de>
To:     Robin Murphy <robin.murphy@arm.com>,
        Uwe =?ISO-8859-1?Q?Kleine=2DK=F6nig?= 
        <u.kleine-koenig@pengutronix.de>
Cc:     Johan Jonker <jbx6244@gmail.com>, thierry.reding@gmail.com,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        sebastian.reichel@collabora.com, wxt@rock-chips.com,
        kever.yang@rock-chips.com, linux-pwm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v1 2/2] ARM: dts: rk3288: add the interrupts property for PWM
Date:   Wed, 19 Oct 2022 11:16:58 +0200
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In-Reply-To: <20221019072621.lh5hcznggbcscihf@pengutronix.de>
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Am Mittwoch, 19. Oktober 2022, 09:26:21 CEST schrieb Uwe Kleine-K?nig:
> On Thu, Sep 29, 2022 at 04:50:43PM +0100, Robin Murphy wrote:
> > On 2022-09-29 15:04, Johan Jonker wrote:
> > > The Rockchip rk3288 SoC has 4-built-in PWM channels.
> > > 
> > > Configurable to operate in capture mode.
> > > Measures the high/low polarity effective cycles of this input waveform
> > > Generates a single interrupt at the transition of input waveform polarity
> > > 
> > > Configurable to operate in continuous mode or one-shot mode.
> > > One-shot operation will produce N + 1 periods of the waveform,
> > > where N is the repeat counter value, and generates a single interrupt at
> > > the end of operation.
> > > Continuous mode generates the waveform continuously and
> > > do not generates any interrupts.
> > > 
> > > Add interrupts property to rk3288 PWM nodes.
> > 
> > As far as I can make out from the TRM, these are only valid when
> > GRF_SOC_CON2[0] = 0, otherwise it's in "new" RK_PWM mode using SPI 78 for
> > all channels. Which apparently will be the case for anyone using upstream
> > U-Boot:
> > 
> > https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-rockchip/rk3288/rk3288.c#L83
> 
> Huh, so it depends on a (software) setting which irqs are in use?

In the past when Rockchip swapped one IP block for another they often
had both in a soc for one generation (as a safeguard probably)
So the rk3288 has two different pwm implementations and the GRF
register selects which one is active.

Heiko

> So the
> patch isn't correct as is, but I have no idea how to make it right.
> Should we rely on the bootloader to fixup the dtb correctly?
> 
> Anyhow, I'm marking the patch as 'changes-requested' in our patchwork
> instance.
> 
> Best regards
> Uwe
> 
>