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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f20-20020a0564021e9400b0045cecdc1fbcsi19531095edf.9.2022.10.20.09.25.02; Thu, 20 Oct 2022 09:25:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=DQyutvi7; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229454AbiJTQED (ORCPT + 99 others); Thu, 20 Oct 2022 12:04:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230461AbiJTQDb (ORCPT ); Thu, 20 Oct 2022 12:03:31 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 504061BA1E7; Thu, 20 Oct 2022 09:03:28 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29KG3DbZ005217; Thu, 20 Oct 2022 11:03:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666281793; bh=U+hC7ByBwFE4JjAug0CbHq7f6BlLapgHTsla8sqywTk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DQyutvi7i1DDB13Bv/nhfRB/AqzyaKH48riSIeoiMlQng1l9uZ7R5vj3oYtmMhllS KmSpEhNKC/+fHtOq6FDuMdTMetUMjZVS8o6R2XDhQKRO7ogrrpUzhdA6qe+Tn+Ch14 59uXF+nhWG1pLmAHvEeJYCRwghI/1gvFrQouJ51Q= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29KG3Dib013933 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 20 Oct 2022 11:03:13 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 20 Oct 2022 11:03:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 20 Oct 2022 11:03:12 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29KG363H059665; Thu, 20 Oct 2022 11:03:12 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 09/12] arm64: dts: ti: k3-j7200: Enable Mailbox nodes at the board level Date: Thu, 20 Oct 2022 11:03:02 -0500 Message-ID: <20221020160305.18711-10-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221020160305.18711-1-afd@ti.com> References: <20221020160305.18711-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Mailbox nodes defined in the top-level J7200 SoC dtsi files are incomplete and may not be functional unless they are extended with a chosen interrupt and connection to a remote processor. As the remote processors depend on memory nodes which are only known at the board integration level, these nodes should only be enabled when provided with the above information. Disable the Mailbox nodes in the dtsi files and only enable the ones that are actually used on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 12 ++++++ arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 42 +-------------------- 2 files changed, 14 insertions(+), 40 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 610d042ffa1d6..138381f43ce40 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -142,6 +142,7 @@ mailbox0_cluster0: mailbox@31f80000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster1: mailbox@31f81000 { @@ -151,6 +152,7 @@ mailbox0_cluster1: mailbox@31f81000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster2: mailbox@31f82000 { @@ -160,6 +162,7 @@ mailbox0_cluster2: mailbox@31f82000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster3: mailbox@31f83000 { @@ -169,6 +172,7 @@ mailbox0_cluster3: mailbox@31f83000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster4: mailbox@31f84000 { @@ -178,6 +182,7 @@ mailbox0_cluster4: mailbox@31f84000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster5: mailbox@31f85000 { @@ -187,6 +192,7 @@ mailbox0_cluster5: mailbox@31f85000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster6: mailbox@31f86000 { @@ -196,6 +202,7 @@ mailbox0_cluster6: mailbox@31f86000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster7: mailbox@31f87000 { @@ -205,6 +212,7 @@ mailbox0_cluster7: mailbox@31f87000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster8: mailbox@31f88000 { @@ -214,6 +222,7 @@ mailbox0_cluster8: mailbox@31f88000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster9: mailbox@31f89000 { @@ -223,6 +232,7 @@ mailbox0_cluster9: mailbox@31f89000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster10: mailbox@31f8a000 { @@ -232,6 +242,7 @@ mailbox0_cluster10: mailbox@31f8a000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; mailbox0_cluster11: mailbox@31f8b000 { @@ -241,6 +252,7 @@ mailbox0_cluster11: mailbox@31f8b000 { ti,mbox-num-users = <4>; ti,mbox-num-fifos = <16>; interrupt-parent = <&main_navss_intr>; + status = "disabled"; }; main_ringacc: ringacc@3c000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index 2d615c3e9fa10..fa44ed4c17d50 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -144,6 +144,7 @@ flash@0,0 { }; &mailbox0_cluster0 { + status = "okay"; interrupts = <436>; mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { @@ -158,6 +159,7 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { }; &mailbox0_cluster1 { + status = "okay"; interrupts = <432>; mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { @@ -171,46 +173,6 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { }; }; -&mailbox0_cluster2 { - status = "disabled"; -}; - -&mailbox0_cluster3 { - status = "disabled"; -}; - -&mailbox0_cluster4 { - status = "disabled"; -}; - -&mailbox0_cluster5 { - status = "disabled"; -}; - -&mailbox0_cluster6 { - status = "disabled"; -}; - -&mailbox0_cluster7 { - status = "disabled"; -}; - -&mailbox0_cluster8 { - status = "disabled"; -}; - -&mailbox0_cluster9 { - status = "disabled"; -}; - -&mailbox0_cluster10 { - status = "disabled"; -}; - -&mailbox0_cluster11 { - status = "disabled"; -}; - &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, -- 2.37.3