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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5278.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 83b0bdf0-a00f-4aac-6c3f-08dab2b3a20b X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Oct 2022 15:56:21.3737 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jR8BX56cssXxQQHtp8CK0O2igtHg1RDOGX9CJKg93qyqC/ixNKsnDR4yZOhENWCElssCP1SyCpVV0NDPd6bZIw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7542 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only - General] Hi Ray.=20 > -----Original Message----- > From: Huang, Ray > Sent: Monday, October 17, 2022 5:47 PM > To: Yuan, Perry > Cc: rafael.j.wysocki@intel.com; viresh.kumar@linaro.org; Sharma, Deepak > ; Limonciello, Mario > ; Fontenot, Nathan > ; Deucher, Alexander > ; Huang, Shimmer > ; Du, Xiaojian ; Meng, > Li (Jassmine) ; linux-pm@vger.kernel.org; linux- > kernel@vger.kernel.org > Subject: Re: [RESEND PATCH V2 2/9] cpufreq: amd_pstate: add module > parameter to load amd pstate EPP driver >=20 > On Tue, Oct 11, 2022 at 12:22:41AM +0800, Yuan, Perry wrote: > > The amd_pstate mode parameter will allow user to select which amd > > pstate working mode as booting mode, amd_pstate instance or > amd_pstate_epp instance. > > > > 1) amd_pstate instance is depending on the target operation mode. > > 2) amd_pstate_epp instance is depending on the set_policy operation > mode.It > > is also called active mode that AMD SMU has EPP algorithm to control= the > > CPU runtime frequency according to the EPP set value and workload. > > >=20 > There is one concern here: how can the user know which kind of processor > supports the EPP function in hardware? >=20 > Thanks, > Ray Checked with internal team, I was told that EPP is part of the CPPC impleme= ntation,=20 The Pstate driver already check if the cppc valid when driver loading, we d= o not need to check the epp again.=20 Perry. >=20 > > Signed-off-by: Perry Yuan > > --- > > drivers/cpufreq/amd-pstate.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/cpufreq/amd-pstate.c > > b/drivers/cpufreq/amd-pstate.c index f52b8f2fe529..2d28f458589c 100644 > > --- a/drivers/cpufreq/amd-pstate.c > > +++ b/drivers/cpufreq/amd-pstate.c > > @@ -63,6 +63,10 @@ module_param(shared_mem, bool, 0444); > > MODULE_PARM_DESC(shared_mem, > > "enable amd-pstate on processors with shared memory > solution > > (false =3D disabled (default), true =3D enabled)"); > > > > +static bool epp =3D false; > > +module_param(epp, bool, 0444); > > +MODULE_PARM_DESC(epp, "Enable energy performance preference (EPP) > > +control"); > > + > > static struct cpufreq_driver amd_pstate_driver; > > > > /** > > -- > > 2.34.1 > >