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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hb43-20020a170907162b00b0078d25d59f62si17181837ejc.21.2022.10.20.20.50.50; Thu, 20 Oct 2022 20:51:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=casper.20170209 header.b=jPWpIVKY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229674AbiJUDjB (ORCPT + 99 others); Thu, 20 Oct 2022 23:39:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229454AbiJUDi5 (ORCPT ); Thu, 20 Oct 2022 23:38:57 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 560181EEF35; Thu, 20 Oct 2022 20:38:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=1XY73f1kjOU4NdkwAVhndbgqvAKzNMKeh42X8Tt0Wkw=; b=jPWpIVKYoxvDDgxbcKiw/lXPPT 1LEj3moZ+xR5z103bB9Dbe/R0y8xz42AMGxzKRoBtVA1STPNlx3rPPKEEi4/IIkDH0LBlru86x02f O24rRi97bFyMhvrK/fDNvBve6BdXyyAlnQyplqqzBqqaKBk8LGLFY0rBEpwjGxX4BS0Fg3N9x/tMG sKCmeytDq8T3+azeoGdA/oOfOE3inboL/Peuo+A8L0dNv63o3A4lJFZ3iC5VjsIB/NcFyi0yPS/0+ 6bsTiWGhYVdpi4WUjEynekfJj3rk3vxFFfLSvwe3qCYmO5fnoIZVxywahWn9ytz4R1MQ5Hf1Y1ctd oU2kAutA==; Received: from willy by casper.infradead.org with local (Exim 4.94.2 #2 (Red Hat Linux)) id 1olirY-00CrCi-Qx; Fri, 21 Oct 2022 03:38:24 +0000 Date: Fri, 21 Oct 2022 04:38:24 +0100 From: Matthew Wilcox To: Linus Torvalds Cc: Peter Zijlstra , the arch/x86 maintainers , Yu Zhao , Andrew Morton , Andi Kleen , Aneesh Kumar , Catalin Marinas , Dave Hansen , Hillf Danton , Jens Axboe , Johannes Weiner , Jonathan Corbet , Mel Gorman , Michael Larabel , Michal Hocko , Mike Rapoport , Tejun Heo , Vlastimil Babka , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, page-reclaim@google.com, Brian Geffon , Jan Alexander Steffens , Oleksandr Natalenko , Steven Barrett , Suleiman Souhlal , Daniel Byrne , Donald Carr , Holger =?iso-8859-1?Q?Hoffst=E4tte?= , Konstantin Kharlamov , Shuang Zhai , Sofia Trinh , Vaibhav Jain Subject: Re: [PATCH v14 08/14] mm: multi-gen LRU: support page table walks Message-ID: References: <20220815071332.627393-1-yuzhao@google.com> <20220815071332.627393-9-yuzhao@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 20, 2022 at 07:10:46PM -0700, Linus Torvalds wrote: > Maybe we should just bite the bullet, and say that we only support > x86-32 with 'cmpxchg8b' (ie Pentium and later). > > Get rid of all the "emulate 64-bit atomics with cli/sti, knowing that > nobody has SMP on those CPU's anyway", and implement a generic x86-32 > xchg() setup using that try_cmpxchg64 loop. > > I think most (all?) distros already enable X86_PAE anyway, which makes > that X86_CMPXCHG64 be part of the base requirement. > > Not that I'm convinced most distros even do 32-bit development anyway > these days. > > (Of course, if we require X86_CMPXCHG64, we'll also hit some of the > odd clone CPU's that actually *do* support the instruction, but do not > report it in cpuid due to an odd old Windows NT bug. IOW, things like > the Cyrix and Transmeta CPU's did support the instruction, but had the > CX8 bit clear because otherwise NT wouldn't boot. We may or may not > get those cases right, but I doubt anybody really has any of those old > CPUs). > > We got rid of i386 support back in 2012. Maybe it's time to get rid of > i486 support in 2022? Arnd suggested removing i486 last year and got a bit of pushback. The most convincing to my mind was Maciej: https://lore.kernel.org/lkml/alpine.DEB.2.21.2110231853170.38243@angie.orcam.me.uk/ but you can see a few other responses indicating that people have shipped new 486-class hardware within the last few years (!)