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From:   Lukasz Majczak <lma@semihalf.com>
Date:   Fri, 21 Oct 2022 12:17:35 +0200
Message-ID: <CAFJ_xbq0cxcH-cgpXLU4Mjk30+muWyWm1aUZGK7iG53yaLBaQg@mail.gmail.com>
Subject: [BUG] Intel Apollolake: PCIe bridge "loses" capabilities after
 entering D3Cold state
To:     bhelgaas@google.com, Rajat Jain <rajatja@google.com>,
        Vidya Sagar <vidyas@nvidia.com>
Cc:     upstream@semihalf.com, linux-pci@vger.kernel.org,
        LKML <linux-kernel@vger.kernel.org>
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Hi,

This a follow-up from a discussion from =E2=80=9C[PATCH V2] PCI/ASPM:
Save/restore L1SS Capability for suspend/resume=E2=80=9D
(https://lore.kernel.org/lkml/d3228b1f-8d12-bfab-4cba-6d93a6869f20@nvidia.c=
om/t/)

While working with Vidya=E2=80=99s patch I have noticed that after
suspend/resume cycle on my Chromebook (Apollolake) PCIe bridge loses
its capabilities - the missing part is:

Capabilities: [200 v1] L1 PM Substates
L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+
  PortCommonModeRestoreTime=3D40us PortTPowerOnTime=3D10us
L1SubCtl1: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+
   T_CommonMode=3D40us LTR1.2_Threshold=3D98304ns
L1SubCtl2: T_PwrOn=3D60us

Digging more I=E2=80=99ve found out that entering D3Cold state causes this
issue (D3Hot seems to work fine).

With Vidya=E2=80=99s patch (all versions form V1 to V3) on upstream kernels
5.10/5.15  it was causing underlying device unavailable (in my case -
WiFi card) - the V4 (which was accepted and merged) works fine (I
guess thanks to =E2=80=9CPCI/ASPM: Refactor L1 PM Substates Control Registe=
r
programming=E2=80=9D) but the issue is still there - I mean now after
suspend/resume the underlying deceive works fine but mentioned
capabilities are still gone when using lspci -vvv.

I think with current code it does no harm to anyone, but just doing a
heads up about this.

Best regards,
Lukasz