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Date:   Sun, 23 Oct 2022 17:20:48 +0100
From:   "Russell King (Oracle)" <linux@armlinux.org.uk>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Marcin Wojtas <mw@semihalf.com>,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, gregory.clement@bootlin.com,
        sebastian.hesselbarth@gmail.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, hch@lst.de, kabel@kernel.org,
        jaz@semihalf.com
Subject: Re: [PATCH] ARM: dts: armada-38x: Mark devices as dma-coherent
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On Sun, Oct 23, 2022 at 05:04:01PM +0200, Andrew Lunn wrote:
> On Sun, Oct 23, 2022 at 01:40:24AM +0200, Marcin Wojtas wrote:
> > Armada 38x platforms marks all devices as coherent via
> > mvebu_hwcc_notifier(), whereas the standard way to determine
> > this is by of_dma_is_coherent(). Reflect the hardware
> > capabilities by adding 'dma-coherent' properties to the device tree.
> 
> Hi Marcin
> 
> Does this need to go to -rc for 6.0? The DMA issues being reported?
> If so, please add a Fixed: tag.

Are we absolutely sure this makes sense?

Looking at atch/arm/mach-mvebu/coherency.c, there are dependencies
on stuff such as whether the kernel is in SMP mode or not (because
the page tables need to be appropriately marked as shared for
coherency with IO to work). We only enable the shared bit if we're
in SMP mode because (a) its difficult to do at runtime due to TLB
conflicts (requires switching the MMU off, rewriting the page tables
and switching the MMU back on), and (b) setting the shared bit for
CPUs that don't need it _can_ result in the CPUs basically bypassing
their caches and thus kill system performance.

So, if we have Armada 38x platforms that are operated in uniprocessor
mode, this patch can cause havoc on such a setup.

I would suggest utmost caution with this approach.

-- 
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