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Date:   Mon, 24 Oct 2022 08:51:02 +0200
From:   Marek =?UTF-8?B?QmVow7pu?= <kabel@kernel.org>
To:     Marcin Wojtas <mw@semihalf.com>
Cc:     "Russell King (Oracle)" <linux@armlinux.org.uk>,
        Andrew Lunn <andrew@lunn.ch>,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, gregory.clement@bootlin.com,
        sebastian.hesselbarth@gmail.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, hch@lst.de, jaz@semihalf.com
Subject: Re: [PATCH] ARM: dts: armada-38x: Mark devices as dma-coherent
Message-ID: <20221024085102.15712ce9@thinkpad>
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On Sun, 23 Oct 2022 23:30:34 +0200
Marcin Wojtas <mw@semihalf.com> wrote:

> niedz., 23 pa=C5=BA 2022 o 18:21 Russell King (Oracle)
> <linux@armlinux.org.uk> napisa=C5=82(a):
> >
> > On Sun, Oct 23, 2022 at 05:04:01PM +0200, Andrew Lunn wrote: =20
> > > On Sun, Oct 23, 2022 at 01:40:24AM +0200, Marcin Wojtas wrote: =20
> > > > Armada 38x platforms marks all devices as coherent via
> > > > mvebu_hwcc_notifier(), whereas the standard way to determine
> > > > this is by of_dma_is_coherent(). Reflect the hardware
> > > > capabilities by adding 'dma-coherent' properties to the device tree=
. =20
> > >
> > > Hi Marcin
> > >
> > > Does this need to go to -rc for 6.0? The DMA issues being reported?
> > > If so, please add a Fixed: tag. =20
> >
> > Are we absolutely sure this makes sense?
> >
> > Looking at atch/arm/mach-mvebu/coherency.c, there are dependencies
> > on stuff such as whether the kernel is in SMP mode or not (because
> > the page tables need to be appropriately marked as shared for
> > coherency with IO to work). We only enable the shared bit if we're
> > in SMP mode because (a) its difficult to do at runtime due to TLB
> > conflicts (requires switching the MMU off, rewriting the page tables
> > and switching the MMU back on), and (b) setting the shared bit for
> > CPUs that don't need it _can_ result in the CPUs basically bypassing
> > their caches and thus kill system performance.
> >
> > So, if we have Armada 38x platforms that are operated in uniprocessor
> > mode, this patch can cause havoc on such a setup.
> >
> > I would suggest utmost caution with this approach.
> > =20
>=20
> Sure. In such a case the description of 380 variant (single core)
> should remain untouched.
>=20
> We need to decide what to do with dual-CPU, i.e. Armada 385/388. How abou=
t:
> - Don't change current behavior, i.e. perform a necessary kernel
> configuration in "arm,pl310-cache" driver,
> arch/arm/mach-mvebu/coherency.c + &coherencyfab:node in DT
> - Satisfy of_dma_is_coherent() by adding `dma-coherent;` in
> armada-385.dtsi only (IMO this would describe HW properly)
> ?

It will describe HW properly, but someone running older kernel compiled
with no SMP support will see a performance drop. I wonder how many
people do that.

Marek