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Date:   Tue, 25 Oct 2022 10:20:38 -0400
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Subject: Re: [PATCH 3/3] Revert "drm/amd/display: Limit max DSC target bpp for
 specific monitors"
To:     Hamza Mahfooz <hamza.mahfooz@amd.com>, linux-kernel@vger.kernel.org
Cc:     Roman Li <roman.li@amd.com>, Leo Li <sunpeng.li@amd.com>,
        Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>,
        Alex Deucher <alexander.deucher@amd.com>,
        =?UTF-8?Q?Christian_K=c3=b6nig?= <christian.koenig@amd.com>,
        "Pan, Xinhui" <Xinhui.Pan@amd.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
        Maxime Ripard <mripard@kernel.org>,
        Thomas Zimmermann <tzimmermann@suse.de>,
        Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>,
        Aurabindo Pillai <aurabindo.pillai@amd.com>,
        Wayne Lin <Wayne.Lin@amd.com>, Fangzhi Zuo <Jerry.Zuo@amd.com>,
        Lyude Paul <lyude@redhat.com>, Ian Chen <ian.chen@amd.com>,
        Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>,
        Claudio Suarez <cssk@net-c.es>,
        Colin Ian King <colin.king@intel.com>,
        hersen wu <hersenxs.wu@amd.com>, amd-gfx@lists.freedesktop.org,
        dri-devel@lists.freedesktop.org
References: <20221024192224.180507-1-hamza.mahfooz@amd.com>
 <20221024192224.180507-3-hamza.mahfooz@amd.com>
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From:   Harry Wentland <harry.wentland@amd.com>
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 =?utf-8?B?Yk5iYWQvME41TS8vUXZ0S0tQOG05SXVWc2kxN0F1THJta0RVNE9oRDF5bEt5?=
 =?utf-8?B?T0t2K2NFN2NTYWQrMzRSeXdCNnBQVVlwZm91b3M1WE5lMS8reSs3bHBRRFhD?=
 =?utf-8?B?ajVoZkxsVFlBTWVXb2ZTRjdXemhyak1lcGE2djRHUzd1VUVvc2lXTHRFc1ZV?=
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 =?utf-8?B?OERDWE84WVRmT2Zoc2U0YXM3Qm9lREs3WVcvOW5CSEZTNlVtWEQrelVHaEJv?=
 =?utf-8?B?c0w2bGFyYkZiL0ZuOXUwM2RvejdVSEdxQkxSTVAySkY2YW1TSk5DWWxrS012?=
 =?utf-8?B?cm1OUGpQZk54WTNqYmIyaVZpWDdYSUFwQVNlMHZwZU1YdjBZNUJmKzIrS3pG?=
 =?utf-8?B?bk9NakJDK3g0TTdKa2ZpR3lhLytwbUkxNURCN0U1VlZVblFPYk5veFVaZXdV?=
 =?utf-8?B?T0ZKSkpxaTNRakkyMDJBQmVpOG9VSHBEYWxhWHpCNjEyQlp5L3ZYcWxOSFQv?=
 =?utf-8?B?ZzNoSVZOang1RkdmQzJmSnEvb0ZXQXhKLytHL3BqSkwybXlXalRJNERBZHFH?=
 =?utf-8?B?OWxqZWIrSDZyNFRlcXlTSWZvVUZZL29LQjZYTy9SeVkxU3Z0MHNZdUFHYmYw?=
 =?utf-8?B?eDBRSjgwSVVRNXVLR2ZzMGJJRGdLVEdGZGZaRVVFMGluajhSdElhRlRtTjQ1?=
 =?utf-8?B?YVdLZ3diREl0RTZ3WFhYalFSQ1hpK0hydUhwNk8rQUpLMlNUZUVEcEE0OURD?=
 =?utf-8?B?WU1URVJ1VnJuaStqbEhpbStQbUU5SFJqNXQvTm04UlF5SkVrSHI3Mmx3aVoy?=
 =?utf-8?B?M3hzZ1N4VnpXbGlvSVV1T1NRem8zNFRuMUFEaTRlL0dKV201NWtFVWJPZkI2?=
 =?utf-8?B?Q2VQQXlEcUZUODM1OEVveW5rbkRTdjFXZ1M1dGpwU2VNMUxVdWtVVGJXMi80?=
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 =?utf-8?B?K2ljcDRoRXd1bnJpVklaUnN2VEJBODh2aHF1LzY5eFdjSkQvSDVzTzJqck5N?=
 =?utf-8?B?TzJxY3VNTlU2Q2pNZGZMa2s4M1BUNzRQbUNYZUJva2pweWR5ak9FOERsMFFF?=
 =?utf-8?B?S0kwbUx5Z1Y3dXcyaVNUeHdYeHpFeGNPYSs0a3U2RTV0azNhUzJoSW8vUzA1?=
 =?utf-8?B?VTNxeUQwOTQyNG84aHpKZXFBK2E0QTNPcVF3QjE1bkRJVnJBRzBxOEdDaEN3?=
 =?utf-8?B?ZmhKelBwTUtBdXBUcVdmRkJtendzQy9aNkFma0VCaUo0TFpCZncwQnZJdSto?=
 =?utf-8?B?eGRqRy95RnpUUlRTanJIcjJ4eVhzY3pSRUxjSFdjVUo2UnFVMk5BOFgyeExG?=
 =?utf-8?B?b2VpZkk2S2pSN1NyL2cxSnpELzZON0ZGUlNERHhhamkxM3RabG1OSS9jUDZH?=
 =?utf-8?B?UHFmZzlpaXlIMk9GaWlBb3FKOUNmbFRCbDdLOExGU1BWOVFMa211ZGN1dXpp?=
 =?utf-8?B?dU9NajN2RHpmU3hRSnFPNi9lRk56aHozOVpXaU9hWnFvTmk1eEdnU1o5Zmx4?=
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Series is

Reviewed-by: Harry Wentland <harry.wentland@amd.com>

Harry

On 2022-10-24 15:22, Hamza Mahfooz wrote:
> This reverts commit 55eea8ef98641f6e1e1c202bd3a49a57c1dd4059.
> 
> This quirk is now handled in the DRM core, so we can drop all of
> the internal code that was added to handle it.
> 
> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
> ---
>  .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 35 -------------------
>  1 file changed, 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> index 4956a0118215..a21e2ba77ddb 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
> @@ -41,39 +41,6 @@
>  #include "dm_helpers.h"
>  #include "ddc_service_types.h"
>  
> -struct monitor_patch_info {
> -	unsigned int manufacturer_id;
> -	unsigned int product_id;
> -	void (*patch_func)(struct dc_edid_caps *edid_caps, unsigned int param);
> -	unsigned int patch_param;
> -};
> -static void set_max_dsc_bpp_limit(struct dc_edid_caps *edid_caps, unsigned int param);
> -
> -static const struct monitor_patch_info monitor_patch_table[] = {
> -{0x6D1E, 0x5BBF, set_max_dsc_bpp_limit, 15},
> -{0x6D1E, 0x5B9A, set_max_dsc_bpp_limit, 15},
> -};
> -
> -static void set_max_dsc_bpp_limit(struct dc_edid_caps *edid_caps, unsigned int param)
> -{
> -	if (edid_caps)
> -		edid_caps->panel_patch.max_dsc_target_bpp_limit = param;
> -}
> -
> -static int amdgpu_dm_patch_edid_caps(struct dc_edid_caps *edid_caps)
> -{
> -	int i, ret = 0;
> -
> -	for (i = 0; i < ARRAY_SIZE(monitor_patch_table); i++)
> -		if ((edid_caps->manufacturer_id == monitor_patch_table[i].manufacturer_id)
> -			&&  (edid_caps->product_id == monitor_patch_table[i].product_id)) {
> -			monitor_patch_table[i].patch_func(edid_caps, monitor_patch_table[i].patch_param);
> -			ret++;
> -		}
> -
> -	return ret;
> -}
> -
>  /* dm_helpers_parse_edid_caps
>   *
>   * Parse edid caps
> @@ -148,8 +115,6 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
>  	kfree(sads);
>  	kfree(sadb);
>  
> -	amdgpu_dm_patch_edid_caps(edid_caps);
> -
>  	return result;
>  }
>