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(2603:10b6:610:143::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5746.23; Tue, 25 Oct 2022 23:50:12 +0000 Received: from CY4PR11MB1862.namprd11.prod.outlook.com ([fe80::207e:ab0b:9e29:6a4b]) by CY4PR11MB1862.namprd11.prod.outlook.com ([fe80::207e:ab0b:9e29:6a4b%12]) with mapi id 15.20.5746.028; Tue, 25 Oct 2022 23:50:12 +0000 Message-ID: <75059026-f5fb-59de-8f68-bb71597d55e6@intel.com> Date: Tue, 25 Oct 2022 16:50:08 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Firefox/102.0 Thunderbird/102.4.0 Subject: Re: [PATCH v7 12/12] Documentation/x86: Update resctrl.rst for new features Content-Language: en-US To: Babu Moger , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , References: <166604543832.5345.9696970469830919982.stgit@bmoger-ubuntu> <166604565437.5345.14867510739122394750.stgit@bmoger-ubuntu> From: Reinette Chatre In-Reply-To: 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR11MB7201 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_HI,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE, SPF_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Babu, On 10/17/2022 3:27 PM, Babu Moger wrote: ... > +"mbm_total_config", "mbm_local_config": > + These files contain the current event configuration for the events > + mbm_total_bytes and mbm_local_bytes, respectively, when the > + Bandwidth Monitoring Event Configuration (BMEC) feature is supported. > + The event configuration settings are domain specific and will affect > + all the CPUs in the domain. > + > + Following are the types of events supported: > + > + ==== ======================================================== > + Bits Description > + ==== ======================================================== > + 6 Dirty Victims from the QOS domain to all types of memory > + 5 Reads to slow memory in the non-local NUMA domain > + 4 Reads to slow memory in the local NUMA domain > + 3 Non-temporal writes to non-local NUMA domain > + 2 Non-temporal writes to local NUMA domain > + 1 Reads to memory in the non-local NUMA domain > + 0 Reads to memory in the local NUMA domain > + ==== ======================================================== > + > + By default, the mbm_total_bytes configuration is set to 0x7f to count > + all the event types and the mbm_local_bytes configuration is set to > + 0x15 to count all the local memory events. > + > + Examples: > + > + * To view the current configuration:: > + :: > + > + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_config > + 0=0x7f;1=0x7f;2=0x7f;3=0x7f > + > + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_config > + 0=0x15;1=0x15;3=0x15;4=0x15 > + > + * To change the mbm_total_bytes to count only reads on domain 0, > + the bits 0, 1, 4 and 5 needs to be set, which is 110011b in binary > + (in hexadecimal 0x33): > + :: > + > + # echo "0=0x33" > /sys/fs/resctrl/info/L3_MON/mbm_total_config > + > + # cat /sys/fs/resctrl/info/L3_MON/mbm_total_config > + 0=0x33;1=0x7f;2=0x7f;3=0x7f > + > + * To change the mbm_local_bytes to count all the slow memory reads > + on domain 1, the bits 4 and 5 needs to be set, which is 110000b > + in binary (in hexadecimal 0x30): > + :: > + > + # echo "1=0x30" > /sys/fs/resctrl/info/L3_MON/mbm_local_config > + > + # cat /sys/fs/resctrl/info/L3_MON/mbm_local_config > + 0=0x15;1=0x30;3=0x15;4=0x15 > The code supports modifying multiple domains with one write. To help users understand this it may be useful to have one of these examples do so to show that and how it can be done. > "max_threshold_occupancy": > Read/write file provides the largest value (in > @@ -464,6 +539,26 @@ Memory bandwidth domain is L3 cache. > > MB:=bw_MBps0;=bw_MBps1;... > > +Slow Memory bandwidth Allocation (SMBA) bandwidth -> Bandwidth? > +--------------------------------------- > +AMD hardwares support Slow Memory bandwidth Allocation (SMBA) feature. hardware -> hardware? bandwidth -> Bandwidth? Reinette