Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Brent Lu <brent.lu@intel.com>
To:     alsa-devel@alsa-project.org
Cc:     Brent Lu <brent.lu@intel.com>, linux-kernel@vger.kernel.org,
        Cezary Rojewski <cezary.rojewski@intel.com>,
        Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
        Liam Girdwood <liam.r.girdwood@linux.intel.com>,
        Peter Ujfalusi <peter.ujfalusi@linux.intel.com>,
        Bard Liao <yung-chuan.liao@linux.intel.com>,
        Ranjani Sridharan <ranjani.sridharan@linux.intel.com>,
        Kai Vehmanen <kai.vehmanen@linux.intel.com>,
        Mark Brown <broonie@kernel.org>,
        Jaroslav Kysela <perex@perex.cz>,
        Takashi Iwai <tiwai@suse.com>, Yong Zhi <yong.zhi@intel.com>,
        Ajye Huang <ajye.huang@gmail.com>,
        Mac Chiang <mac.chiang@intel.com>,
        Vamshi Krishna <vamshi.krishna.gopal@intel.com>,
        Rander Wang <rander.wang@intel.com>,
        Gongjun Song <gongjun.song@intel.com>,
        Muralidhar Reddy <muralidhar.reddy@intel.com>,
        "balamurugan . c" <balamurugan.c@intel.com>,
        Chao Song <chao.song@linux.intel.com>
Subject: [PATCH 1/2] ASoC: Intel: add helpers to detect SoCs
Date:   Wed, 26 Oct 2022 15:14:08 +0800
Message-Id: <20221026071409.3235144-2-brent.lu@intel.com>
In-Reply-To: <20221026071409.3235144-1-brent.lu@intel.com>
References: <20221026071409.3235144-1-brent.lu@intel.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Add helpers to detect JSL, TGL, ADL, and ADL-N SoCs.

Signed-off-by: Brent Lu <brent.lu@intel.com>
---
 include/linux/platform_data/x86/soc.h | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/include/linux/platform_data/x86/soc.h b/include/linux/platform_data/x86/soc.h
index da05f425587a..08d08c91d57b 100644
--- a/include/linux/platform_data/x86/soc.h
+++ b/include/linux/platform_data/x86/soc.h
@@ -33,6 +33,10 @@ SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT);
 SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT);
 SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS);
 SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
+SOC_INTEL_IS_CPU(jsl, ATOM_TREMONT_L);
+SOC_INTEL_IS_CPU(tgl, TIGERLAKE_L);
+SOC_INTEL_IS_CPU(adl, ALDERLAKE_L);
+SOC_INTEL_IS_CPU(adl_n, ALDERLAKE_N);
 
 #else /* IS_ENABLED(CONFIG_X86) */
 
@@ -60,6 +64,26 @@ static inline bool soc_intel_is_cml(void)
 {
 	return false;
 }
+
+static inline bool soc_intel_is_jsl(void)
+{
+	return false;
+}
+
+static inline bool soc_intel_is_tgl(void)
+{
+	return false;
+}
+
+static inline bool soc_intel_is_adl(void)
+{
+	return false;
+}
+
+static inline bool soc_intel_is_adl_n(void)
+{
+	return false;
+}
 #endif /* IS_ENABLED(CONFIG_X86) */
 
 #endif /* __PLATFORM_DATA_X86_SOC_H */
-- 
2.25.1