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[209.85.128.175]) by smtp.gmail.com with ESMTPSA id f14-20020a05620a280e00b006eec09eed39sm3534288qkp.40.2022.10.26.00.29.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Oct 2022 00:29:07 -0700 (PDT) Received: by mail-yw1-f175.google.com with SMTP id 00721157ae682-369426664f9so138742927b3.12; Wed, 26 Oct 2022 00:29:07 -0700 (PDT) X-Received: by 2002:a81:5a57:0:b0:353:6de6:3263 with SMTP id o84-20020a815a57000000b003536de63263mr37779589ywb.358.1666769347215; Wed, 26 Oct 2022 00:29:07 -0700 (PDT) MIME-Version: 1.0 References: <20220915165256.352843-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220915165256.352843-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Wed, 26 Oct 2022 09:28:55 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/2] arm64: dts: renesas: rzg2ul-smarc: Add /omit-if-no-ref/ to pinmux To: "Lad, Prabhakar" Cc: Magnus Damm , Rob Herring , Krzysztof Kozlowski , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Biju Das , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.6 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Prabhakar, On Wed, Oct 26, 2022 at 12:39 AM Lad, Prabhakar wrote: > On Tue, Oct 25, 2022 at 9:13 AM Geert Uytterhoeven wrote: > > On Thu, Sep 15, 2022 at 6:53 PM Prabhakar wrote: > > > From: Lad Prabhakar > > > > > > In preparation to re-use the RZ/G2UL SMARC SoM and carrier DTS/I with the > > > RZ/Five add /omit-if-no-ref/ keyword to pinmux entries as the support for > > > RZ/Five SMARC EVK will be gradually added. > > > > > > Once we have full blown support for RZ/Five SMARC EVK we can get rid of > > > the /omit-if-no-ref/ keyword. > > > > > > Signed-off-by: Lad Prabhakar > > > > Thanks for your patch! > > > > I finally had a deeper look at this... > > > > Why do you want to disable these nodes? While they are indeed not > > used yet on RZ/Five, they are valid hardware descriptions for the > > RZ/Five SMARC EVK, and their presence doesn't harm anything. > > > > I do see a valid use case for marking pin control subnodes with > > /omit-if-no-ref/: you can provide all possible configurations as a > > convenience for the user, so the user no longer has to look up the > > numeric parameters of the RZG2L_PORT_PINMUX() macros. > > But IMHO those would belong in the SoC-specific .dtsi, not in a > > board .dtsi. See e.g. the massive use of /omit-if-no-ref/ in sunxi > > and rockchip .dtsi files. > > > > Am I missing something? > > > My intention was to keep the DTB as minimal as possible so that it > includes just the required pinmuxes which were enabled on the RZ/Five. > For example [0], [1] we do delete the pinctrl for the nodes which are > marked as disabled. Do you think we should drop it? You mean /delete-property/ pinctrl-0; /delete-property/ pinctrl-names; ? These do not delete pinctrl subnodes, but pinctrl properties in disabled device nodes pointing to pinctrl subnodes. The actual pinctrl subnodes are still present. > But now that things are falling in place for RZ/Five we can ignore this patch. Agreed. > [0] arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi > [1] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds