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Sender: Guenter Roeck <groeck7@gmail.com>
Date:   Wed, 26 Oct 2022 08:06:39 -0700
From:   Guenter Roeck <linux@roeck-us.net>
To:     Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc:     linux-hwmon@vger.kernel.org, jdelvare@suse.com,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 2/2] hwmon: (jc42) Restore the min/max/critical
 temperatures on resume
Message-ID: <20221026150639.GA2546475@roeck-us.net>
References: <20221023213157.11078-1-martin.blumenstingl@googlemail.com>
 <20221023213157.11078-3-martin.blumenstingl@googlemail.com>
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On Sun, Oct 23, 2022 at 11:31:57PM +0200, Martin Blumenstingl wrote:
> The JC42 compatible thermal sensor on Kingston KSM32ES8/16ME DIMMs
> (using Micron E-Die) is an ST Microelectronics STTS2004 (manufacturer
> 0x104a, device 0x2201). It does not keep the previously programmed
> minimum, maximum and critical temperatures after system suspend and
> resume (which is a shutdown / startup cycle for the JC42 temperature
> sensor). This results in an alarm on system resume because the hardware
> default for these values is 0?C (so any environment temperature greater
> than 0?C will trigger the alarm).
> 
> Example before system suspend:
>   jc42-i2c-0-1a
>   Adapter: SMBus PIIX4 adapter port 0 at 0b00
>   temp1:        +34.8?C  (low  =  +0.0?C)
>                          (high = +85.0?C, hyst = +85.0?C)
>                          (crit = +95.0?C, hyst = +95.0?C)
> 
> Example after system resume (without this change):
>   jc42-i2c-0-1a
>   Adapter: SMBus PIIX4 adapter port 0 at 0b00
>   temp1:        +34.8?C  (low  =  +0.0?C)             ALARM (HIGH, CRIT)
>                          (high =  +0.0?C, hyst =  +0.0?C)
>                          (crit =  +0.0?C, hyst =  +0.0?C)
> 
> Apply the cached values from the JC42_REG_TEMP_UPPER,
> JC42_REG_TEMP_LOWER, JC42_REG_TEMP_CRITICAL and JC42_REG_SMBUS (where
> the SMBUS register is not related to this issue but a side-effect of
> using regcache_sync() during system resume with the previously
> cached/programmed values. This fixes the alarm due to the hardware
> defaults of 0?C because the previously applied limits (set by userspace)
> are re-applied on system resume.
> 
> Fixes: 175c490c9e7f ("hwmon: (jc42) Add support for STTS2004 and AT30TSE004")
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Applied to hwmon-next.

Thanks,
Guenter

> ---
>  drivers/hwmon/jc42.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c
> index 355639d208d0..0554b41c32bc 100644
> --- a/drivers/hwmon/jc42.c
> +++ b/drivers/hwmon/jc42.c
> @@ -578,6 +578,10 @@ static int jc42_suspend(struct device *dev)
>  
>  	data->config |= JC42_CFG_SHUTDOWN;
>  	regmap_write(data->regmap, JC42_REG_CONFIG, data->config);
> +
> +	regcache_cache_only(data->regmap, true);
> +	regcache_mark_dirty(data->regmap);
> +
>  	return 0;
>  }
>  
> @@ -585,9 +589,13 @@ static int jc42_resume(struct device *dev)
>  {
>  	struct jc42_data *data = dev_get_drvdata(dev);
>  
> +	regcache_cache_only(data->regmap, false);
> +
>  	data->config &= ~JC42_CFG_SHUTDOWN;
>  	regmap_write(data->regmap, JC42_REG_CONFIG, data->config);
> -	return 0;
> +
> +	/* Restore cached register values to hardware */
> +	return regcache_sync(data->regmap);
>  }
>  
>  static const struct dev_pm_ops jc42_dev_pm_ops = {