Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Wed, 26 Oct 2022 14:46:18 -0500
From:   Rob Herring <robh@kernel.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     Frank Wunderlich <linux@fw-web.de>,
        linux-mediatek@lists.infradead.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        devicetree@vger.kernel.org, Ryder Lee <ryder.lee@mediatek.com>,
        linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
        Jianjun Wang <jianjun.wang@mediatek.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/2] dt-bindings: PCI: mediatek-gen3: add support for
 mt7986
Message-ID: <20221026194618.GA1049502-robh@kernel.org>
References: <20221025072837.16591-1-linux@fw-web.de>
 <20221025072837.16591-3-linux@fw-web.de>
 <22728b06-f460-6dda-21fa-1d7a7ae3b903@collabora.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <22728b06-f460-6dda-21fa-1d7a7ae3b903@collabora.com>
Precedence: bulk

On Tue, Oct 25, 2022 at 01:10:56PM +0200, AngeloGioacchino Del Regno wrote:
> Il 25/10/22 09:28, Frank Wunderlich ha scritto:
> > From: Frank Wunderlich <frank-w@public-files.de>
> > 
> > Add compatible string and clock-definition for mt7986. It needs 4 clocks
> > for PCIe, define them in binding.
> > 
> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> > ---
> > v2:
> > - squashed patch 2+3 (compatible and clock definition)
> > ---
> >   .../bindings/pci/mediatek-pcie-gen3.yaml        | 17 +++++++++++++++++
> >   1 file changed, 17 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > index 98d3f0f1cd76..57d0e84253e9 100644
> > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> > @@ -48,6 +48,7 @@ properties:
> >       oneOf:
> >         - items:
> >             - enum:
> > +              - mediatek,mt7986-pcie
> >                 - mediatek,mt8188-pcie
> >                 - mediatek,mt8195-pcie
> >             - const: mediatek,mt8192-pcie
> > @@ -78,9 +79,11 @@ properties:
> >         - const: mac
> >     clocks:
> > +    minItems: 4
> >       maxItems: 6
> 
> I'm not sure that this is really correct.
> If you have a list of items (const or description, doesn't matter), you don't have
> to specify maxItems, as it is implicitly equal to the number of items.
> Also, specifying minItems means that you're "setting" one or more items as
> optional.
> 
> It looks like you're specifying a specific and definite list of items for both
> clocks and clock-names... and for all of the supported SoCs, so, I don't think
> that having {min,max}Items globally specified on clocks, clock-names make any
> kind of sense.
> 
> .....but I'd like for someone else to give an opinion on this as well.

It does make sense. Globally, we have the full range of possible clocks 
and then the if/then schemas further restrict it.

Rob