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Date:   Wed, 26 Oct 2022 15:43:15 -0500
From:   Rob Herring <robh@kernel.org>
To:     Siddharth Vadapalli <s-vadapalli@ti.com>
Cc:     davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
        pabeni@redhat.com, krzysztof.kozlowski@linaro.org,
        krzysztof.kozlowski+dt@linaro.org, linux@armlinux.org.uk,
        vladimir.oltean@nxp.com, vigneshr@ti.com, nsekhar@ti.com,
        netdev@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update
 bindings for J721e CPSW9G
Message-ID: <20221026204315.GA1161577-robh@kernel.org>
References: <20221026090957.180592-1-s-vadapalli@ti.com>
 <20221026090957.180592-2-s-vadapalli@ti.com>
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On Wed, Oct 26, 2022 at 02:39:55PM +0530, Siddharth Vadapalli wrote:
> Update bindings for TI K3 J721e SoC which contains 9 ports (8 external
> ports) CPSW9G module and add compatible for it.

Don't repeat 'bindings' in the subject, space is precious:

dt-bindings: net: ti: k3-am654-cpsw-nuss: Add J721e CPSW9G support

Otherwise,

Reviewed-by: Rob Herring <robh@kernel.org>

> 
> Changes made:
>     - Add new compatible ti,j721e-cpswxg-nuss for CPSW9G.
>     - Extend pattern properties for new compatible.
>     - Change maximum number of CPSW ports to 8 for new compatible.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
>  .../bindings/net/ti,k3-am654-cpsw-nuss.yaml   | 33 ++++++++++++++++---
>  1 file changed, 29 insertions(+), 4 deletions(-)