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Date:   Thu, 27 Oct 2022 14:25:42 +0800
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Subject: Re: [PATCH v2 1/2] dt-bindings: clock: imx8mp: Add ids for the audio
 shared gate
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To:     Shengjiu Wang <shengjiu.wang@nxp.com>, shengjiu.wang@gmail.com,
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References: <1666834442-5609-1-git-send-email-shengjiu.wang@nxp.com>
From:   Peng Fan <peng.fan@oss.nxp.com>
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On 10/27/2022 9:34 AM, Shengjiu Wang wrote:
> From: Abel Vesa <abel.vesa@nxp.com>
> 
> All these IDs are for one single HW gate (CCGR101) that is shared
> between these root clocks.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> changes in v2:
> - split dt-binding to separate patch
> 
>   include/dt-bindings/clock/imx8mp-clock.h | 11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
> index 9d5cc2ddde89..2f6fec299662 100644
> --- a/include/dt-bindings/clock/imx8mp-clock.h
> +++ b/include/dt-bindings/clock/imx8mp-clock.h
> @@ -324,8 +324,17 @@
>   #define IMX8MP_CLK_CLKOUT2_SEL			317
>   #define IMX8MP_CLK_CLKOUT2_DIV			318
>   #define IMX8MP_CLK_CLKOUT2			319
> +#define IMX8MP_CLK_AUDIO_AHB_ROOT		320
> +#define IMX8MP_CLK_AUDIO_AXI_ROOT		321
> +#define IMX8MP_CLK_SAI1_ROOT			322
> +#define IMX8MP_CLK_SAI2_ROOT			323
> +#define IMX8MP_CLK_SAI3_ROOT			324
> +#define IMX8MP_CLK_SAI5_ROOT			325
> +#define IMX8MP_CLK_SAI6_ROOT			326
> +#define IMX8MP_CLK_SAI7_ROOT			327
> +#define IMX8MP_CLK_PDM_ROOT			328
>   
> -#define IMX8MP_CLK_END				320
> +#define IMX8MP_CLK_END				329
>   
>   #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG		0
>   #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1		1

Reviewed-by: Peng Fan <peng.fan@nxp.com>