Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Alexander Stein <alexander.stein@ew.tq-group.com>
To:     shengjiu.wang@gmail.com
Cc:     abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
        shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de,
        festevam@gmail.com, linux-imx@nxp.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, marex@denx.de,
        Shengjiu Wang <shengjiu.wang@nxp.com>
Subject: Re: [PATCH v2 2/2] clk: imx8mp: Add audio shared gate
Date:   Thu, 27 Oct 2022 08:30:55 +0200
Message-ID: <12087191.O9o76ZdvQC@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <1666834442-5609-2-git-send-email-shengjiu.wang@nxp.com>
References: <1666834442-5609-1-git-send-email-shengjiu.wang@nxp.com> <1666834442-5609-2-git-send-email-shengjiu.wang@nxp.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 7Bit
Content-Type: text/plain; charset="us-ascii"
Precedence: bulk

Am Donnerstag, 27. Oktober 2022, 03:34:02 CEST schrieb Shengjiu Wang:
> From: Abel Vesa <abel.vesa@nxp.com>
> 
> According to the RM, the CCGR101 is shared for the following root clocks:
> - AUDIO_AHB_CLK_ROOT
> - AUDIO_AXI_CLK_ROOT
> - SAI1_CLK_ROOT
> - SAI2_CLK_ROOT
> - SAI3_CLK_ROOT
> - SAI5_CLK_ROOT
> - SAI6_CLK_ROOT
> - SAI7_CLK_ROOT
> - PDM_CLK_ROOT
> 
> And correct clock MX8MP_CLK_AUDIO_ROOT to be IMX8MP_CLK_AUDIO_AHB_ROOT.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> changes in v2:
> - split dt-binding to separate patch
> 
>  drivers/clk/imx/clk-imx8mp.c | 11 ++++++++++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
> index 652ae58c2735..0ae3bc7bf8a1 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -17,6 +17,7 @@
> 
>  static u32 share_count_nand;
>  static u32 share_count_media;
> +static u32 share_count_audio;
> 
>  static const char * const pll_ref_sels[] = { "osc_24m", "dummy", "dummy",
> "dummy", }; static const char * const audio_pll1_bypass_sels[] =
> {"audio_pll1", "audio_pll1_ref_sel", }; @@ -699,7 +700,15 @@ static int
> imx8mp_clocks_probe(struct platform_device *pdev) hws[IMX8MP_CLK_HDMI_ROOT]
> = imx_clk_hw_gate4("hdmi_root_clk", "hdmi_axi", ccm_base + 0x45f0, 0);
> hws[IMX8MP_CLK_TSENSOR_ROOT] = imx_clk_hw_gate4("tsensor_root_clk",
> "ipg_root", ccm_base + 0x4620, 0); hws[IMX8MP_CLK_VPU_ROOT] =
> imx_clk_hw_gate4("vpu_root_clk", "vpu_bus", ccm_base + 0x4630, 0);
> -	hws[IMX8MP_CLK_AUDIO_ROOT] = imx_clk_hw_gate4("audio_root_clk",
> "audio_ahb", ccm_base + 0x4650, 0); +	hws[IMX8MP_CLK_AUDIO_AHB_ROOT] =
> imx_clk_hw_gate2_shared2("audio_ahb_root", "audio_ahb", ccm_base + 0x4650,
> 0, &share_count_audio); +	hws[IMX8MP_CLK_AUDIO_AXI_ROOT] =
> imx_clk_hw_gate2_shared2("audio_axi_root", "audio_axi", ccm_base + 0x4650,
> 0, &share_count_audio); +	hws[IMX8MP_CLK_SAI1_ROOT] =
> imx_clk_hw_gate2_shared2("sai1_root", "sai1", ccm_base + 0x4650, 0,
> &share_count_audio); +	hws[IMX8MP_CLK_SAI2_ROOT] =
> imx_clk_hw_gate2_shared2("sai2_root", "sai2", ccm_base + 0x4650, 0,
> &share_count_audio); +	hws[IMX8MP_CLK_SAI3_ROOT] =
> imx_clk_hw_gate2_shared2("sai3_root", "sai3", ccm_base + 0x4650, 0,
> &share_count_audio); +	hws[IMX8MP_CLK_SAI5_ROOT] =
> imx_clk_hw_gate2_shared2("sai5_root", "sai5", ccm_base + 0x4650, 0,
> &share_count_audio); +	hws[IMX8MP_CLK_SAI6_ROOT] =
> imx_clk_hw_gate2_shared2("sai6_root", "sai6", ccm_base + 0x4650, 0,
> &share_count_audio); +	hws[IMX8MP_CLK_SAI7_ROOT] =
> imx_clk_hw_gate2_shared2("sai7_root", "sai7", ccm_base + 0x4650, 0,
> &share_count_audio); +	hws[IMX8MP_CLK_PDM_ROOT] =
> imx_clk_hw_gate2_shared2("pdm_root", "pdm", ccm_base + 0x4650, 0,
> &share_count_audio);
> 
>  	hws[IMX8MP_CLK_ARM] = imx_clk_hw_cpu("arm", "arm_a53_core",
>  					     
hws[IMX8MP_CLK_A53_CORE]->clk,

Now IMX8MP_CLK_AUDIO_ROOT is unused. Should it be removed? Or should the 
rename be done in a separate commit before this one?

Best regards,
Alexander