Received: by 2002:a05:6358:1087:b0:cb:c9d3:cd90 with SMTP id j7csp609243rwi; Thu, 27 Oct 2022 05:40:15 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5qR6BKk8TbXfJz3DqW3uZHFurupu2y/CidpqYCkd7D+RqxwiQJJIE6wWksYqLRFYheqmwx X-Received: by 2002:aa7:c252:0:b0:462:aa0d:4144 with SMTP id y18-20020aa7c252000000b00462aa0d4144mr1239901edo.57.1666874415695; Thu, 27 Oct 2022 05:40:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1666874415; cv=none; d=google.com; s=arc-20160816; b=K1xD1gVkvxkhGUlVXuvLAXK/NNiMm9eTdJagn0pKSGawGWXe1NNdZtOAS/mIYYcQck zz8fv0446GF3l1w8JfXQU3Ra7hr4ebAMRwygy7fNiQw0XwAhbhWldJD+oTwuEnFn1X2s B0wJYc9iJfdt9/8Jm3a2822Yg3mUqSnUs54lyheTm9CY26Jnfv2LVCTdxZOYFIq8AOKg 1u4UmAB0vu/Lxg262SEURU8az79esV93ui6vKupskxrSq7gl0OGMhA8HmCANn946W28O 15Yvg9dLHxQPRuVaaQNWJRyiNaQzWIQDPbDUJK66OiB+seZs8OqAfNz82eO57yq1U8yX 2Vkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=xsGtsidvxvyfqpXeJMajzF00+EPlnmxjEEENNgRqwIk=; b=hoOPNSbqNQ6VVGC9UXdkuYY5hOep7T92un6e/RKghdEt/x+N6DrcX/psYXgj3Aqsla U1dVoNbTwjQ2+b4rrow93wZlyJo+9m3HejueKSUzD9yQkngXj1CYdBGULohTqSduwkfl 7yXb8oFVpqMcm/DztZ7gfXuTqrzW0S0j1hbR9RHecXt3N2UxU6DPmvuvMqzUL6D9skKX USM8EWpO+5PW3k9SCo9FlrDo9Cy8vly/n+ndu/fLuKWJ5CJjU1ezsx+jpB6vnNJj6mLf bBPK/N9SpKUEUKHCjdchXCFid88WTVC/5o/lKXqhLimJVeZ49/Hrve43F2Pnpbl9NgRg PpSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=ySW4WeAL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=lunn.ch Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id he40-20020a1709073da800b0078ca7bbf616si1351656ejc.746.2022.10.27.05.39.49; Thu, 27 Oct 2022 05:40:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=ySW4WeAL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=lunn.ch Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234590AbiJ0MV0 (ORCPT + 99 others); Thu, 27 Oct 2022 08:21:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230441AbiJ0MVY (ORCPT ); Thu, 27 Oct 2022 08:21:24 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7EE105B7A9; Thu, 27 Oct 2022 05:21:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Transfer-Encoding:Content-Disposition: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:From: Sender:Reply-To:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Content-Disposition: In-Reply-To:References; bh=xsGtsidvxvyfqpXeJMajzF00+EPlnmxjEEENNgRqwIk=; b=yS W4WeALI5A3+voHv6z2AQ8Y9fgHothwYySsklSOPalHOwZNxrzi+to4nwrBqhWaNqkGA3DWEmqXoc+ dLyubpCvgqSvCCp7xNrffQJ4nxkD8KqU7LY3HApCL4xWaL33Qv+lsc2E1KVFA4BKSLRRRP+/8hgb/ g943WZpoDIWXurI=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oo1sJ-000hio-7p; Thu, 27 Oct 2022 14:20:43 +0200 Date: Thu, 27 Oct 2022 14:20:43 +0200 From: Andrew Lunn To: Camel Guo Cc: Camel Guo , "David S. Miller" , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Krzysztof Kozlowski , Paolo Abeni , Rob Herring , Russell King , Vivien Didelot , Vladimir Oltean , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "netdev@vger.kernel.org" , Rob Herring , kernel Subject: Re: [RFC net-next 2/2] net: dsa: Add driver for Maxlinear GSW1XX switch Message-ID: References: <20221025135243.4038706-1-camel.guo@axis.com> <20221025135243.4038706-3-camel.guo@axis.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > >> +} > >> + > >> +static int gsw1xx_mdio_wr(struct mii_bus *bus, int addr, int reg, u16 val) > >> +{ > >> +???? struct gsw1xx_priv *priv = bus->priv; > >> +???? int err; > > > > Please check for C45 and return -EOPNOTSUPP. > > Maybe not need. According to the datasheet of gsw145 "The interface uses the > serial protocol defined by IEEE 802.3, clause 22.",? I think it is enough to > add "ds->slave_mii_bus->probe_capabilities = MDIOBUS_C22" into gsw1xx_mdio. It > probe_capabilities is static and never changes. probe_capabilities only limits probing the bus when it is registered. It does not prevent C45 transfers from being requested by PHY drivers. And there are some funky PHY drivers which mix C22 and C45. They can probe via C22 and then use C45. So it is much better to check and return an error if requested to do something which the hardware cannot do. Also, if you don't check, and convert a C45 request into a C22 request, you often end up with really odd accesses, depending on the hardware, reads could become writes, etc. > > I noticed there is no tagging protocol defined. How are frames > > direction out a specific port? > > Yes, this chip supports Special Tags which should be enabled, but unfortunately > I have no make it work. You need to make this work. You added support to set the port spanning tree status. But that makes no sense if you cannot send/receive bridge PDUs out specific ports, etc. > The chip in my dev board works in self-start, managed switch mode. So far, it > works fine on this board. > > > > > I've also not yet looked at the overlap with lantiq_gswip.c. > > The version of GSWIP changes and also the management interface of > it is memory-mapped io. I tried to use the same logic in my gsw145 chip > (with mdio interface update), lots of parts (e.g: fdb, vlan) don't work > at all. There has been past attempts at a driver for this hardware and it was argued that they are sufficiently different that a new driver was needed. As i said, i've not compared the code yet, so i cannot comment on that yet. Andrew