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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id a10-20020a170902ee8a00b00186dcc37e17sm1292899pld.210.2022.10.27.08.10.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Oct 2022 08:10:11 -0700 (PDT) Date: Thu, 27 Oct 2022 15:10:07 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Michal Luczaj , David Woodhouse Subject: Re: [PATCH v2 03/16] KVM: x86: Always use non-compat vcpu_runstate_info size for gfn=>pfn cache Message-ID: References: <20221013211234.1318131-1-seanjc@google.com> <20221013211234.1318131-4-seanjc@google.com> <24768aa3-0e2e-6d29-2749-9d74a26f9205@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <24768aa3-0e2e-6d29-2749-9d74a26f9205@redhat.com> X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 27, 2022, Paolo Bonzini wrote: > On 10/27/22 16:44, Sean Christopherson wrote: > > > - long mode cannot be changed after the shared info page is enabled (which > > > makes sense because the shared info page also has a compat version) > > > > How is this not introducing an additional restriction? This seems way more > > onerous than what is effectively a revert. > > > > > - the caches must be activated after the shared info page (which enforces > > > that the vCPU attributes are set after the VM attributes) > > > > > > This is technically a userspace API break, but nobody is really using this > > > API outside Amazon so... Patches coming after I finish testing. > > > > It's not just userspace break, it affects the guest ABI as well. > > Yes, I was talking of the VMM here; additional restrictions are fine there. Additional restrictions are fine where? > The guests however should be compatible with Xen, so you also need to > re-activate the cache after the hypercall page is written, but that's two > lines of code. And do what if the guest transitions from 32-bit => 64-bit and the cache isn't aligned for 64-bit? E.g. kvm_xen_set_evtchn() will silently drop events no matter what KVM does. In other words, I don't see how KVM can provide a same ABI without forcing the cached pages to be aligned for the largets possible size.