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[209.85.128.170]) by smtp.gmail.com with ESMTPSA id t40-20020a05622a182800b003995f6513b9sm1291368qtc.95.2022.10.27.12.43.17 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 Oct 2022 12:43:17 -0700 (PDT) Received: by mail-yw1-f170.google.com with SMTP id 00721157ae682-36a4b86a0abso26649147b3.7 for ; Thu, 27 Oct 2022 12:43:17 -0700 (PDT) X-Received: by 2002:a81:11d0:0:b0:35b:dd9f:5358 with SMTP id 199-20020a8111d0000000b0035bdd9f5358mr46239372ywr.401.1666899797074; Thu, 27 Oct 2022 12:43:17 -0700 (PDT) MIME-Version: 1.0 References: <20221022114424.515572025@infradead.org> <2c800ed1-d17a-def4-39e1-09281ee78d05@nvidia.com> In-Reply-To: From: Linus Torvalds Date: Thu, 27 Oct 2022 12:43:01 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 01/13] mm: Update ptep_get_lockless()s comment To: Peter Zijlstra Cc: Jann Horn , John Hubbard , x86@kernel.org, willy@infradead.org, akpm@linux-foundation.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, aarcange@redhat.com, kirill.shutemov@linux.intel.com, jroedel@suse.de, ubizjak@gmail.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 27, 2022 at 12:35 PM Peter Zijlstra wrote: > > On Thu, Oct 27, 2022 at 11:13:55AM -0700, Linus Torvalds wrote: > > > But "fullmm" is probably even stronger than "mmap write-lock" in that > > it should also mean "no other CPU can be actively using this" - either > > for hardware page table walking, or for GUP. > > IIRC fullmm is really: this is the last user and we're taking the whole > mm down -- IOW exit(). Yes. But that doesn't mean that it's entirely "just ours" - vmscan can still see the entries due to rmap, I think. So there can still be some concurrency concerns, but it's limited. > Do we worry about CPU errata where things go side-ways if multiple CPUs > have inconsistent TLB state? Yeah, we should definitely worry about those, since I think they have been known to cause machine checks etc, which then crashes the machine because the machine check architecture is broken garbage. "User gets the odd memory ordering they asked for" is different from "user can crash machine because of bad machine check architecture" ;) That said, I don't think this is a real worry here. Because if I recall the errata correctly, they are not about "different TLB contents", but "different cacheability for the same physical page". Because different TLB contents are normal and even expected, I think. Things like kmap_local etc already end up doing some lazy TLB flushing. No? I think it's only "somebody did an UC access to a cacheline I have" that ends up being bad. Note the *WILD HANDWAVING* above - I didn't actually look up the errata. The above is from my dim memories of the issues we had, and I might just be wrong. Linus