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Subject: Re: [PATCH 01/13] mm: Update ptep_get_lockless()s comment
From:   Nadav Amit <nadav.amit@gmail.com>
In-Reply-To: <CAHk-=wihPdOtXgJ32pLB6Xd-UvnaZW9YvOOjM24JGYRjNHeykA@mail.gmail.com>
Date:   Thu, 27 Oct 2022 13:15:22 -0700
Cc:     Peter Zijlstra <peterz@infradead.org>,
        Jann Horn <jannh@google.com>,
        John Hubbard <jhubbard@nvidia.com>, x86@kernel.org,
        willy@infradead.org, Andrew Morton <akpm@linux-foundation.org>,
        linux-kernel@vger.kernel.org, linux-mm@kvack.org,
        Andrea Arcangeli <aarcange@redhat.com>,
        kirill.shutemov@linux.intel.com, jroedel@suse.de, ubizjak@gmail.com
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To:     Linus Torvalds <torvalds@linux-foundation.org>
Precedence: bulk

On Oct 27, 2022, at 11:13 AM, Linus Torvalds =
<torvalds@linux-foundation.org> wrote:

> Anybody willing to try to write up the rules (and have each rule
> document *why* it's a rule - not just "by fiat", but an actual "these
> are the rules and this is *why* they are the rules").
>=20
> Because right now I think all of our rules are almost entirely just
> encoded in the code, with a couple of comments, and a few people who
> just remember why we do what we do.

I think it might be easier to come up with new rules instead of phrasing =
the
existing ones.

The approach I suggested before [1] is something like:

1. Turn x86=E2=80=99s TLB-generation mechanism to be generic. Turn the
   TLB-generation into =E2=80=9Cpending TLB-generation=E2=80=9D.

2. For each mm track =E2=80=9Ccompleted TLB-generation=E2=80=9D, =
whenever an actual flush
   takes place.

3. When you defer a TLB-flush, while holding the PTL:
  a. Increase the TLB-generation.
  b. Save the updated =E2=80=9Ctable generation" in a new field in the
     page-table=E2=80=99s page-struct.

4. When you are about to rely on a PTE value that is read from a =
page-table,
   first check if a TLB flush is needed. The check is performed by =
comparing
   the =E2=80=9Ctable generation=E2=80=9D with the =E2=80=9Ccompleted =
generation=E2=80=9D. If the =E2=80=9Ctable
   generation=E2=80=9D is behind, a TLB flush is needed.

   [ You rely on the PTE value when you install new PTEs or change them =
]

That=E2=80=99s about it. I might have not covered some issues with =
fast-GUP. But in
general I think it is a simple scheme. The thing I like about this =
scheme
the most is that it avoids relying on almost all the OS data-structures
(e.g., PageAnon()), making it much easier to grasp.

I can revive the patch-set if the overall approach is agreeable.


[1] =
https://lore.kernel.org/lkml/20210131001132.3368247-1-namit@vmware.com/=