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From:   "Huang, Ying" <ying.huang@intel.com>
To:     Bharata B Rao <bharata@amd.com>
Cc:     Aneesh Kumar K V <aneesh.kumar@linux.ibm.com>,
        <linux-mm@kvack.org>, <linux-kernel@vger.kernel.org>,
        Andrew Morton <akpm@linux-foundation.org>,
        Alistair Popple <apopple@nvidia.com>,
        "Dan Williams" <dan.j.williams@intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Davidlohr Bueso <dave@stgolabs.net>,
        Hesham Almatary <hesham.almatary@huawei.com>,
        Jagdish Gediya <jvgediya.oss@gmail.com>,
        Johannes Weiner <hannes@cmpxchg.org>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Michal Hocko <mhocko@kernel.org>,
        Tim Chen <tim.c.chen@intel.com>, Wei Xu <weixugc@google.com>,
        Yang Shi <shy828301@gmail.com>
Subject: Re: [RFC] memory tiering: use small chunk size and more tiers
References: <20221027065925.476955-1-ying.huang@intel.com>
        <578c9b89-10eb-1e23-8868-cdd6685d8d4e@linux.ibm.com>
        <877d0kk5uf.fsf@yhuang6-desk2.ccr.corp.intel.com>
        <59291b98-6907-0acf-df11-6d87681027cc@linux.ibm.com>
        <8735b8jy9k.fsf@yhuang6-desk2.ccr.corp.intel.com>
        <0d938c9f-c810-b10a-e489-c2b312475c52@amd.com>
Date:   Fri, 28 Oct 2022 16:33:48 +0800
In-Reply-To: <0d938c9f-c810-b10a-e489-c2b312475c52@amd.com> (Bharata B. Rao's
        message of "Fri, 28 Oct 2022 13:34:46 +0530")
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Bharata B Rao <bharata@amd.com> writes:

> On 10/28/2022 11:16 AM, Huang, Ying wrote:
>> If my understanding were correct, you think the latency / bandwidth of
>> these NUMA nodes will near each other, but may be different.
>> 
>> Even if the latency / bandwidth of these NUMA nodes isn't exactly same,
>> we should deal with that in memory types instead of memory tiers.
>> There's only one abstract distance for each memory type.
>> 
>> So, I still believe we will not have many memory tiers with my proposal.
>> 
>> I don't care too much about the exact number, but want to discuss some
>> general design choice,
>> 
>> a) Avoid to group multiple memory types into one memory tier by default
>>    at most times.
>
> Do you expect the abstract distances of two different types to be
> close enough in real life (like you showed in your example with
> CXL - 5000 and PMEM - 5100) that they will get assigned into same tier
> most times?
>
> Are you foreseeing that abstract distance that get mapped by sources
> like HMAT would run into this issue?

Only if we set abstract distance chunk size large.  So, I think that
it's better to set chunk size as small as possible to avoid potential
issue.  What is the downside to set the chunk size small?

Best Regards,
Huang, Ying