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[209.85.219.170]) by smtp.gmail.com with ESMTPSA id bs30-20020a05620a471e00b006b5c061844fsm1570317qkb.49.2022.10.29.12.14.38 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Oct 2022 12:14:38 -0700 (PDT) Received: by mail-yb1-f170.google.com with SMTP id f205so9621858yba.2 for ; Sat, 29 Oct 2022 12:14:38 -0700 (PDT) X-Received: by 2002:a05:6902:702:b0:6ca:a588:2904 with SMTP id k2-20020a056902070200b006caa5882904mr4923591ybt.571.1667070877749; Sat, 29 Oct 2022 12:14:37 -0700 (PDT) MIME-Version: 1.0 References: <20221022111403.531902164@infradead.org> <20221022114424.515572025@infradead.org> <2c800ed1-d17a-def4-39e1-09281ee78d05@nvidia.com> <6C548A9A-3AF3-4EC1-B1E5-47A7FFBEB761@gmail.com> <47678198-C502-47E1-B7C8-8A12352CDA95@gmail.com> In-Reply-To: From: Linus Torvalds Date: Sat, 29 Oct 2022 12:14:21 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 01/13] mm: Update ptep_get_lockless()s comment To: Nadav Amit Cc: Peter Zijlstra , Jann Horn , John Hubbard , X86 ML , Matthew Wilcox , Andrew Morton , kernel list , Linux-MM , Andrea Arcangeli , "Kirill A . Shutemov" , jroedel@suse.de, ubizjak@gmail.com, Alistair Popple Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Oct 29, 2022 at 11:58 AM Linus Torvalds wrote: > > Still not tested in any way, shape, or form. I decided I wanted to > send this one before booting into this and possibly blowing up ;^) Well, it boots, and I see no difference with your PoC code. It didn't fail for me before, it doesn't fail for me with those patches. Again, the "it doesn't fail for me" is probably because I'm running it incorrectly, although for all I know there can also be hardware differences. I'm testing on an older AMD threadripper, and as I'm sure you are very aware, some AMD cores used to have special support for keeping the TLB coherent with the actual page table contents in order to then avoid TLB flushes entirely. Those things ended up being buggy and disabled, but my point is that hardware differences can obviously actively hide this issue by making the TLB contents track page table changes. So even if I were to run it the same way you do, I might not see the failure due to just running it on different hardware with different TLB and timing. Anyway, the patches don't seem to cause any *obvious* problems. That's not to say that they are correct, or that they fix anything, but it's certainly a fairly simple and straightforward patch, and it "feels right" to me. Sadly, reality doesn't always agree with my feelings. Damn. Linus