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From:   =?utf-8?B?Smlhbmp1biBXYW5nICjnjovlu7rlhpsp?= 
        <Jianjun.Wang@mediatek.com>
To:     "robh@kernel.org" <robh@kernel.org>,
        "frank-w@public-files.de" <frank-w@public-files.de>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-mediatek@lists.infradead.org" 
        <linux-mediatek@lists.infradead.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        Ryder Lee <Ryder.Lee@mediatek.com>,
        "bhelgaas@google.com" <bhelgaas@google.com>
Subject: Re: [PATCH v3 1/2] dt-bindings: PCI: mediatek-gen3: add SoC based
 clock config
Thread-Topic: [PATCH v3 1/2] dt-bindings: PCI: mediatek-gen3: add SoC based
 clock config
Thread-Index: AQHY68AN1c3rDo372E2BtBH+0cRs2q4olqaAgAFnTwA=
Date:   Tue, 1 Nov 2022 12:12:43 +0000
Message-ID: <033a852b31aa8ce3598e968f61e4a75251f1234e.camel@mediatek.com>
References: <20221029175806.14899-1-frank-w@public-files.de>
         <20221029175806.14899-2-frank-w@public-files.de>
         <20221031144301.GA2856406-robh@kernel.org>
In-Reply-To: <20221031144301.GA2856406-robh@kernel.org>
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