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Sender: Guenter Roeck <groeck7@gmail.com>
Date:   Tue, 1 Nov 2022 07:24:12 -0700
From:   Guenter Roeck <linux@roeck-us.net>
To:     Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc:     linux-hwmon@vger.kernel.org, jdelvare@suse.com,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] hwmon: (jc42) Consistently use bit and bitfield macros
 in the driver
Message-ID: <20221101142412.GA1311621@roeck-us.net>
References: <20221031215140.482457-1-martin.blumenstingl@googlemail.com>
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On Mon, Oct 31, 2022 at 10:51:40PM +0100, Martin Blumenstingl wrote:
> Use BIT() and GENMASK() macros for defining the bitfields inside the
> registers. Also use FIELD_GET() and FIELD_PREP() where appropriate. This
> makes the coding style within the driver consistent. No functional
> changes intended.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> This is a small patch with what I consider non-functional improvements.
> It makes the driver code consistent with what I am familiar with from
> other drivers (not limited to hwmon).
> So I'm curious if others also feel that this is an improvement.
> 

I like it. I'll queue it up for 6.2.

Guenter

> 
>  drivers/hwmon/jc42.c | 36 ++++++++++++++++++------------------
>  1 file changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c
> index 6593d81cb901..8523bf974310 100644
> --- a/drivers/hwmon/jc42.c
> +++ b/drivers/hwmon/jc42.c
> @@ -10,6 +10,7 @@
>   */
>  
>  #include <linux/bitops.h>
> +#include <linux/bitfield.h>
>  #include <linux/module.h>
>  #include <linux/init.h>
>  #include <linux/slab.h>


> @@ -37,20 +38,19 @@ static const unsigned short normal_i2c[] = {
>  #define JC42_REG_SMBUS		0x22 /* NXP and Atmel, possibly others? */
>  
>  /* Status bits in temperature register */
> -#define JC42_ALARM_CRIT_BIT	15
> -#define JC42_ALARM_MAX_BIT	14
> -#define JC42_ALARM_MIN_BIT	13
> +#define JC42_ALARM_CRIT		BIT(15)
> +#define JC42_ALARM_MAX		BIT(14)
> +#define JC42_ALARM_MIN		BIT(13)
>  
>  /* Configuration register defines */
> -#define JC42_CFG_CRIT_ONLY	(1 << 2)
> -#define JC42_CFG_TCRIT_LOCK	(1 << 6)
> -#define JC42_CFG_EVENT_LOCK	(1 << 7)
> -#define JC42_CFG_SHUTDOWN	(1 << 8)
> -#define JC42_CFG_HYST_SHIFT	9
> -#define JC42_CFG_HYST_MASK	(0x03 << 9)
> +#define JC42_CFG_CRIT_ONLY	BIT(2)
> +#define JC42_CFG_TCRIT_LOCK	BIT(6)
> +#define JC42_CFG_EVENT_LOCK	BIT(7)
> +#define JC42_CFG_SHUTDOWN	BIT(8)
> +#define JC42_CFG_HYST_MASK	GENMASK(10, 9)
>  
>  /* Capabilities */
> -#define JC42_CAP_RANGE		(1 << 2)
> +#define JC42_CAP_RANGE		BIT(2)
>  
>  /* Manufacturer IDs */
>  #define ADT_MANID		0x11d4  /* Analog Devices */
> @@ -277,8 +277,8 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
>  			break;
>  
>  		temp = jc42_temp_from_reg(regval);
> -		hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
> -						>> JC42_CFG_HYST_SHIFT];
> +		hyst = jc42_hysteresis[FIELD_GET(JC42_CFG_HYST_MASK,
> +						 data->config)];
>  		*val = temp - hyst;
>  		break;
>  	case hwmon_temp_crit_hyst:
> @@ -288,8 +288,8 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
>  			break;
>  
>  		temp = jc42_temp_from_reg(regval);
> -		hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
> -						>> JC42_CFG_HYST_SHIFT];
> +		hyst = jc42_hysteresis[FIELD_GET(JC42_CFG_HYST_MASK,
> +						 data->config)];
>  		*val = temp - hyst;
>  		break;
>  	case hwmon_temp_min_alarm:
> @@ -297,21 +297,21 @@ static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
>  		if (ret)
>  			break;
>  
> -		*val = (regval >> JC42_ALARM_MIN_BIT) & 1;
> +		*val = FIELD_GET(JC42_ALARM_MIN, regval);
>  		break;
>  	case hwmon_temp_max_alarm:
>  		ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval);
>  		if (ret)
>  			break;
>  
> -		*val = (regval >> JC42_ALARM_MAX_BIT) & 1;
> +		*val = FIELD_GET(JC42_ALARM_MAX, regval);
>  		break;
>  	case hwmon_temp_crit_alarm:
>  		ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval);
>  		if (ret)
>  			break;
>  
> -		*val = (regval >> JC42_ALARM_CRIT_BIT) & 1;
> +		*val = FIELD_GET(JC42_ALARM_CRIT, regval);
>  		break;
>  	default:
>  		ret = -EOPNOTSUPP;
> @@ -370,7 +370,7 @@ static int jc42_write(struct device *dev, enum hwmon_sensor_types type,
>  				hyst = 3;	/* 6.0 degrees C */
>  		}
>  		data->config = (data->config & ~JC42_CFG_HYST_MASK) |
> -				(hyst << JC42_CFG_HYST_SHIFT);
> +				FIELD_PREP(JC42_CFG_HYST_MASK, hyst);
>  		ret = regmap_write(data->regmap, JC42_REG_CONFIG,
>  				   data->config);
>  		break;
> -- 
> 2.38.1
>