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Date:   Wed, 2 Nov 2022 08:28:25 -0700
From:   Colin Foster <colin.foster@in-advantage.com>
To:     Miquel Raynal <miquel.raynal@bootlin.com>
Cc:     Roger Quadros <rogerq@kernel.org>, linux-kernel@vger.kernel.org,
        linux-mtd@lists.infradead.org, Pratyush Yadav <p.yadav@ti.com>,
        Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= 
        <u.kleine-koenig@pengutronix.de>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Richard Weinberger <richard@nod.at>
Subject: Re: Barebox / Kernel Omap ECC inconsistency?
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On Wed, Nov 02, 2022 at 02:14:00PM +0100, Miquel Raynal wrote:
> Hi Colin,
> 
> rogerq@kernel.org wrote on Wed, 2 Nov 2022 09:12:27 +0200:
> 
> > Hi Colin,
> > 
> > On 01/11/2022 21:09, Colin Foster wrote:
> > > Hello,
> > > 
> > > I'm trying to revive a product that runs on a Phytec OMAP 4460 SOM. I
> > > submitted a .dts RFC a month or so ago, and plan to perform the
> > > suggestions and resubmit, but I'm up against one main hurdle that seems
> > > to be related to flash OOB/ECC. (get_maintainers on
> > > drivers/mtd/nand/raw/omap2.c is how I got this email list)
> > > 
> > > Barebox has "native" support for the Phytec SOM:
> > > https://git.pengutronix.de/cgit/barebox/tree/arch/arm/boards/phytec-phycore-omap4460
> > > 
> > > It seems like Barebox is writing and expecting ECC bits to start at an
> > > offset of 12 bytes, while the kernel (and Barebox comments suggest) the
> > > ECC bytes should start at 2. I'm seeing this with
> > > `nanddump -n -o -l 0x41000 -f mtdxnanddump /dev/mtdx`
> > > 
> > > Barebox created partition with UBI (mtd3)
> > > ...
> > > 00000800  ff ff ff ff ff ff ff ff  ff ff ff ff 56 49 fd 17
> > > 00000810  b2 25 60 1a 42 1d eb 56  5d ff ff ff ff ff ff ff
> > > ...
> > > 
> > > Kernel created partition with UBI (mtd4)
> > > ...
> > > 00000800  ff ff 07 73 04 ac 57 6b  9b 1f 92 49 ab e0 b9 ff
> > > 00000810  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff
> > > ...
> > > 
> > > 
> > > My question: 
> > > 
> > > Am I right to assume this is an issue in Barebox? Perhaps this is just a  
> > 
> > I'm guessing so. Both u-boot and Linux for OMAP put the ECC bytes right
> > after the Bad block marker which is 2 bytes.
> 
> Yep. I checked, this has been like that since at least 2014, I don't
> think we changed the layout in U-Boot/Linux "recently"... (I haven't
> checked earlier, by laziness).
> 
> > https://elixir.bootlin.com/linux/latest/source/drivers/mtd/nand/raw/omap2.c#L1729
> > https://elixir.bootlin.com/linux/latest/source/drivers/mtd/nand/raw/omap2.c#L134
> > 
> > > bug that has been fairly dormant for 15 years. If that is the case, I
> > > assume there's probably no hope in getting this mainlined, and "native"
> > > barebox support is just a ruse.
> > > 
> > > If that isn't the case, is there a hidden "shift OOB by 10" config
> > > option that I'm missing? Or am I interpreting this data incorrectly?
> > > 
> > > 
> > > Any suggestions would be greatly appreciated.  
> > 
> > You should fix the OMAP NAND driver/config in Barebox to match that
> > with Linux OMAP NAND driver if you want them to run on the same system.
> 
> Agreed.

Got it. Thanks a lot for the info Roger and Miquel. I think this should
be pretty doable, and I'll venture down that path.

> 
> Thanks,
> Miquèl