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From:   Dipen Patel <dipenp@nvidia.com>
To:     <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
        <linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
        <linux-gpio@vger.kernel.org>, <linus.walleij@linaro.org>,
        <devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
        <robh+dt@kernel.org>
CC:     Dipen Patel <dipenp@nvidia.com>
Subject: [PATCH 6/7] arm64: tegra: Enable GTE nodes
Date:   Thu, 3 Nov 2022 10:45:22 -0700
Message-ID: <20221103174523.29592-7-dipenp@nvidia.com>
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Add and enable AON and LIC GTE nodes by default.

Signed-off-by: Dipen Patel <dipenp@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 20 ++++++++++++++++++++
 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 20 ++++++++++++++++++++
 2 files changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 41f3a7e188d0..67927d97956e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1366,6 +1366,16 @@
 			status = "disabled";
 		};
 
+                hte_lic: hardware-timestamp@3aa0000 {
+                        compatible = "nvidia,tegra194-gte-lic";
+                        reg = <0x3aa0000 0x10000>;
+                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                        nvidia,int-threshold = <1>;
+                        nvidia,slices = <11>;
+                        #timestamp-cells = <1>;
+                        status = "okay";
+                };
+
 		hsp_top0: hsp@3c00000 {
 			compatible = "nvidia,tegra194-hsp";
 			reg = <0x03c00000 0xa0000>;
@@ -1579,6 +1589,16 @@
 			#mbox-cells = <2>;
 		};
 
+                hte_aon: hardware-timestamp@c1e0000 {
+                        compatible = "nvidia,tegra194-gte-aon";
+                        reg = <0xc1e0000 0x10000>;
+                        interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                        nvidia,int-threshold = <1>;
+                        nvidia,slices = <3>;
+                        #timestamp-cells = <1>;
+                        status = "okay";
+                };
+
 		gen2_i2c: i2c@c240000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0x0c240000 0x10000>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 0170bfa8a467..fecf9ab1bf17 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -949,6 +949,16 @@
 			clock-names = "fuse";
 		};
 
+                hte_lic: hardware-timestamp@3aa0000 {
+                        compatible = "nvidia,tegra234-gte-lic";
+                        reg = <0x3aa0000 0x10000>;
+                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                        nvidia,int-threshold = <1>;
+                        nvidia,slices = <17>;
+                        #timestamp-cells = <1>;
+                        status = "okay";
+                };
+
 		hsp_top0: hsp@3c00000 {
 			compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
 			reg = <0x03c00000 0xa0000>;
@@ -1466,6 +1476,16 @@
 			#mbox-cells = <2>;
 		};
 
+                hte_aon: hardware-timestamp@c1e0000 {
+                        compatible = "nvidia,tegra234-gte-aon";
+                        reg = <0xc1e0000 0x10000>;
+                        interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                        nvidia,int-threshold = <1>;
+                        nvidia,slices = <3>;
+                        #timestamp-cells = <1>;
+                        status = "okay";
+                };
+
 		gen2_i2c: i2c@c240000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0xc240000 0x100>;
-- 
2.17.1