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charset="us-ascii" Content-ID: <98BF04E0DD06C34B80D9E2CA7E9B6280@eurprd04.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5136.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 10df03c4-a6e4-4462-27c5-08dabe7af22d X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Nov 2022 15:40:48.4367 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 1CNObh92O0UTBGmcZB9XrI4laeZ8NC94C0cvRkAt2b4/BOaa8mqO0xFe+zPr9oZU6ouLffvS+ZkMIjTWcRZbDw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7976 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 04, 2022 at 11:08:07AM -0400, Krzysztof Kozlowski wrote: > On 04/11/2022 10:32, Vladimir Oltean wrote: > > On Fri, Nov 04, 2022 at 10:31:06AM -0400, Krzysztof Kozlowski wrote: > >>> diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/= qcom-ipq4019.dtsi > >>> index b23591110bd2..5fa1af147df9 100644 > >>> --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi > >>> +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi > >>> @@ -38,6 +38,7 @@ aliases { > >>> spi1 =3D &blsp1_spi2; > >>> i2c0 =3D &blsp1_i2c3; > >>> i2c1 =3D &blsp1_i2c4; > >>> + ethernet0 =3D &gmac; > >> > >> Hm, I have doubts about this one. Why alias is needed and why it is a > >> property of a SoC? Not every board has Ethernet enabled, so this looks > >> like board property. > >> > >> I also wonder why do you need it at all? > >=20 > > In general, Ethernet aliases are needed so that the bootloader can fix > > up the MAC address of each port's OF node with values it gets from the > > U-Boot environment or an AT24 EEPROM or something like that. >=20 > Assuming that's the case here, my other part of question remains - is > this property of SoC or board? The buses (SPI, I2C) are properties of > boards, even though were incorrectly put here. If the board has multiple > ethernets, the final ordering is the property of the board, not SoC. I > would assume that bootloader also configures the MAC address based on > the board config, not per SoC... I don't disagree. On NXP LS1028A, we also have all aliases in board device trees and not in the SoC dtsi.=