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From:   =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
To:     linux-spi@vger.kernel.org, openbmc@lists.ozlabs.org
Cc:     Lee Jones <lee@kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>,
        Mark Brown <broonie@kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-gpio@vger.kernel.org
Subject: [PATCH 0/8] Nuvoton WPCM450 FIU SPI flash controller
Date:   Sat,  5 Nov 2022 19:59:03 +0100
Message-Id: <20221105185911.1547847-1-j.neuschaefer@gmx.net>
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 7k//slWMHPh8Hrq2gPzixGromD+zVzHkp+Uh2Ta/jGEb1GovCJ4oRYykLzoNt1iIWNxT4K2AB
 XdnYnRCykuUV7tKyOWvx9FaxIa0j4XJRU4cgku4av2uBUU2OrdgQqINuk7JLgtnu2tn/AEy/R
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 FeFJODT4YTClALNh+i2hm8l2VLknbpMStd5oqHs+vhrU01NI8L2qVA4tl5IwyjJsmpiGWT54K
 NtrN2Ka33X30nfLTDeGC+KUO4oMJGDDcefxFbjjTgeKxpf25/vr87HO81NzN/7VNl40lcJ6xK
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 ZtLwpr2Q+GvCyMo4MfsDr8t0wokve/l3FRxJn72fdMCYJhVXdf9K+URF96ruuQeUp/Dd/oBpC
 4c5lvlsQeLJY91won9J3Lb7Gs4ZuMzZeiI7gU43I3xdcZr7c1asLaOVho+H91xK/uXqGtgv58
 8zM5k7sFygPcGdsSC/0Lue+nDlaxbiIl8rdeug+7pQrJkFn63hCwQULKV5swpWEMF+pg8ccJp
 sFpSPQNdnZYsamiCIgOePho4EeJRCUiqOQE6V1O/BUKwa6aXGDN53pWWMvEWo+gH7WmhpPQ3l
 9EdJlQQxIl/dMCXPL8Gx87ZZkayHNcHnBrfeK4qPPbZd/bBWibK4/AnAikp8aUH8NZFYSt8EI
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Precedence: bulk

This patchset adds DT bindings and a driver for the Flash Interface Unit
(FIU), the SPI flash controller in the Nuvoton WPCM450 BMC SoC. It
supports four chip selects, and direct (memory-mapped) access to 16 MiB
per chip. Larger flash chips can be accessed by software-defined SPI
transfers.

The existing NPCM7xx FIU driver is sufficitently incompatible with the
WPCM450 FIU that I decided to write a new driver.

This patchset depends on the WPCM450 clock support patchset,

	[PATCH v5 0/6] Nuvoton WPCM450 clock and reset driver


Jonathan


Jonathan Neusch=C3=A4fer (8):
  pinctrl: nuvoton: wpcm450: Refactor MFSEL setting code
  pinctrl: nuvoton: wpcm450: Fix handling of inverted MFSEL bits
  dt-bindings: spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU)
  dt-bindings: mfd: syscon: Add nuvoton,wpcm450-shm
  ARM: dts: wpcm450: Add FIU SPI controller node
  ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add SPI flash
  spi: wpcm-fiu: Add driver for Nuvoton WPCM450 Flash Interface Unit
    (FIU)
  spi: wpcm-fiu: Add direct map support

 .../devicetree/bindings/mfd/syscon.yaml       |   1 +
 .../bindings/spi/nuvoton,wpcm450-fiu.yaml     |  76 +++
 .../nuvoton-wpcm450-supermicro-x9sci-ln4f.dts |   9 +
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi        |  16 +
 drivers/pinctrl/nuvoton/pinctrl-wpcm450.c     |  32 +-
 drivers/spi/Kconfig                           |  11 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-wpcm-fiu.c                    | 507 ++++++++++++++++++
 8 files changed, 644 insertions(+), 9 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/nuvoton,wpcm450-=
fiu.yaml
 create mode 100644 drivers/spi/spi-wpcm-fiu.c

=2D-
2.35.1